rewrite JIT memory emulation

This commit is contained in:
RSDuck
2020-05-09 00:45:05 +02:00
parent b902cd1b8e
commit 052ff73672
14 changed files with 1494 additions and 844 deletions

View File

@ -98,6 +98,10 @@ void ARMv5::CP15DoSavestate(Savestate* file)
void ARMv5::UpdateDTCMSetting()
{
#ifdef JIT_ENABLED
u32 oldDTCMBase = DTCMBase;
u32 oldDTCMSize = DTCMSize;
#endif
if (CP15Control & (1<<16))
{
DTCMBase = DTCMSetting & 0xFFFFF000;
@ -110,10 +114,20 @@ void ARMv5::UpdateDTCMSetting()
DTCMSize = 0;
//printf("DTCM disabled\n");
}
#ifdef JIT_ENABLED
if (oldDTCMBase != DTCMBase || oldDTCMSize != DTCMSize)
{
ARMJIT::UpdateMemoryStatus9(oldDTCMBase, oldDTCMBase + oldDTCMSize);
ARMJIT::UpdateMemoryStatus9(DTCMBase, DTCMBase + DTCMSize);
}
#endif
}
void ARMv5::UpdateITCMSetting()
{
#ifdef JIT_ENABLED
u32 oldITCMSize = ITCMSize;
#endif
if (CP15Control & (1<<18))
{
ITCMSize = 0x200 << ((ITCMSetting >> 1) & 0x1F);
@ -124,6 +138,10 @@ void ARMv5::UpdateITCMSetting()
ITCMSize = 0;
//printf("ITCM disabled\n");
}
#ifdef JIT_ENABLED
if (oldITCMSize != ITCMSize)
ARMJIT::UpdateMemoryStatus9(0, std::max(oldITCMSize, ITCMSize));
#endif
}
@ -562,15 +580,9 @@ void ARMv5::CP15Write(u32 id, u32 val)
case 0x750:
#ifdef JIT_ENABLED
ARMJIT::InvalidateAll();
#endif
ICacheInvalidateAll();
return;
case 0x751:
#ifdef JIT_ENABLED
ARMJIT::InvalidateByAddr(ARMJIT::TranslateAddr<0>(val));
#endif
ICacheInvalidateByAddr(val);
return;
case 0x752:
@ -733,7 +745,7 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch)
void ARMv5::DataRead8(u32 addr, u32* val)
{
DataRegion = addr >> 12;
DataRegion = addr;
if (addr < ITCMSize)
{
@ -754,7 +766,7 @@ void ARMv5::DataRead8(u32 addr, u32* val)
void ARMv5::DataRead16(u32 addr, u32* val)
{
DataRegion = addr >> 12;
DataRegion = addr;
addr &= ~1;
@ -777,7 +789,7 @@ void ARMv5::DataRead16(u32 addr, u32* val)
void ARMv5::DataRead32(u32 addr, u32* val)
{
DataRegion = addr >> 12;
DataRegion = addr;
addr &= ~3;
@ -821,14 +833,14 @@ void ARMv5::DataRead32S(u32 addr, u32* val)
void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataRegion = addr >> 12;
DataRegion = addr;
if (addr < ITCMSize)
{
DataCycles = 1;
*(u8*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::InvalidateITCM(addr & 0x7FFF);
ARMJIT::InvalidateITCMIfNecessary(addr);
#endif
return;
}
@ -845,7 +857,7 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataRegion = addr >> 12;
DataRegion = addr;
addr &= ~1;
@ -854,7 +866,7 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
DataCycles = 1;
*(u16*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::InvalidateITCM(addr & 0x7FFF);
ARMJIT::InvalidateITCMIfNecessary(addr);
#endif
return;
}
@ -871,7 +883,7 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataRegion = addr >> 12;
DataRegion = addr;
addr &= ~3;
@ -880,7 +892,7 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
DataCycles = 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::InvalidateITCM(addr & 0x7FFF);
ARMJIT::InvalidateITCMIfNecessary(addr);
#endif
return;
}
@ -904,7 +916,7 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
DataCycles += 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::InvalidateITCM(addr & 0x7FFF);
ARMJIT::InvalidateITCMIfNecessary(addr);
#endif
return;
}