mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-22 22:01:06 -06:00
begin work on general timing renovation. way shitty because it behaves as if caches were off, so everything will be slow as shit.
This commit is contained in:
318
src/ARM.cpp
318
src/ARM.cpp
@ -22,6 +22,20 @@
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#include "ARMInterpreter.h"
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// instruction timing notes
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//
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// * simple instruction: 1S (code)
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// * LDR: 1N+1N+1I (code/data/internal)
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// * STR: 1N+1N (code/data)
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// * LDM: 1N+1N+(n-1)S+1I
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// * STM: 1N+1N+(n-1)S
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// * MUL/etc: 1N+xI (code/internal)
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// * branch: 1N+1S (code/code) (pipeline refill)
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//
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// MUL/MLA seems to take 1I on ARM9
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u32 ARM::ConditionTable[16] =
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{
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0xF0F0, // EQ
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@ -49,97 +63,6 @@ ARM::ARM(u32 num)
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Num = num;
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SetClockShift(0); // safe default
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for (int i = 0; i < 16; i++)
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{
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Waitstates[0][i] = 1;
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Waitstates[1][i] = 1;
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Waitstates[2][i] = 1;
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Waitstates[3][i] = 1;
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}
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if (!num)
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{
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// ARM9
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Waitstates[0][0x2] = 1; // main RAM timing, assuming cache hit
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Waitstates[0][0x3] = 4;
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Waitstates[0][0x4] = 4;
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Waitstates[0][0x5] = 5;
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Waitstates[0][0x6] = 5;
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Waitstates[0][0x7] = 4;
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Waitstates[0][0x8] = 19;
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Waitstates[0][0x9] = 19;
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Waitstates[0][0xF] = 4;
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Waitstates[1][0x2] = 1;
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Waitstates[1][0x3] = 8;
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Waitstates[1][0x4] = 8;
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Waitstates[1][0x5] = 10;
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Waitstates[1][0x6] = 10;
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Waitstates[1][0x7] = 8;
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Waitstates[1][0x8] = 38;
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Waitstates[1][0x9] = 38;
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Waitstates[1][0xF] = 8;
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Waitstates[2][0x2] = 1;
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Waitstates[2][0x3] = 2;
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Waitstates[2][0x4] = 2;
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Waitstates[2][0x5] = 2;
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Waitstates[2][0x6] = 2;
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Waitstates[2][0x7] = 2;
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Waitstates[2][0x8] = 12;
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Waitstates[2][0x9] = 12;
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Waitstates[2][0xA] = 20;
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Waitstates[2][0xF] = 2;
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Waitstates[3][0x2] = 1;
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Waitstates[3][0x3] = 2;
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Waitstates[3][0x4] = 2;
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Waitstates[3][0x5] = 4;
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Waitstates[3][0x6] = 4;
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Waitstates[3][0x7] = 2;
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Waitstates[3][0x8] = 24;
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Waitstates[3][0x9] = 24;
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Waitstates[3][0xA] = 20;
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Waitstates[3][0xF] = 2;
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}
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else
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{
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// ARM7
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Waitstates[0][0x0] = 1;
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Waitstates[0][0x2] = 1;
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Waitstates[0][0x3] = 1;
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Waitstates[0][0x4] = 1;
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Waitstates[0][0x6] = 1;
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Waitstates[0][0x8] = 6;
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Waitstates[0][0x9] = 6;
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Waitstates[1][0x0] = 1;
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Waitstates[1][0x2] = 2;
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Waitstates[1][0x3] = 1;
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Waitstates[1][0x4] = 1;
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Waitstates[1][0x6] = 2;
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Waitstates[1][0x8] = 12;
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Waitstates[1][0x9] = 12;
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Waitstates[2][0x0] = 1;
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Waitstates[2][0x2] = 1;
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Waitstates[2][0x3] = 1;
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Waitstates[2][0x4] = 1;
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Waitstates[2][0x6] = 1;
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Waitstates[2][0x8] = 6;
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Waitstates[2][0x9] = 6;
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Waitstates[2][0xA] = 10;
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Waitstates[3][0x0] = 1;
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Waitstates[3][0x2] = 2;
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Waitstates[3][0x3] = 1;
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Waitstates[3][0x4] = 1;
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Waitstates[3][0x6] = 2;
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Waitstates[3][0x8] = 12;
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Waitstates[3][0x9] = 12;
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Waitstates[3][0xA] = 10;
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}
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}
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ARM::~ARM()
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@ -147,6 +70,16 @@ ARM::~ARM()
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// dorp
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}
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ARMv5::ARMv5() : ARM(0)
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{
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//
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}
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ARMv4::ARMv4() : ARM(1)
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{
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//
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}
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void ARM::Reset()
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{
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Cycles = 0;
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@ -165,6 +98,13 @@ void ARM::Reset()
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JumpTo(ExceptionBase);
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}
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void ARMv5::Reset()
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{
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ARM::Reset();
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CP15Reset();
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}
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void ARM::DoSavestate(Savestate* file)
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{
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file->Section((char*)(Num ? "ARM7" : "ARM9"));
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@ -189,14 +129,29 @@ void ARM::DoSavestate(Savestate* file)
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SetupCodeMem(R[15]); // should fix it
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}
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void ARMv5::DoSavestate(Savestate* file)
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{
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ARM::DoSavestate(file);
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CP15DoSavestate(file);
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}
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void ARMv5::CalculateTimings()
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{
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//
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}
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void ARMv4::CalculateTimings()
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{
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//
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}
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void ARM::SetupCodeMem(u32 addr)
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{
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if (!Num)
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{
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if (CP15::GetCodeMemRegion(addr, &CodeMem))
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return;
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NDS::ARM9GetMemRegion(addr, false, &CodeMem);
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((ARMv5*)this)->GetCodeMemRegion(addr, &CodeMem);
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}
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else
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{
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@ -204,7 +159,7 @@ void ARM::SetupCodeMem(u32 addr)
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}
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}
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void ARM::JumpTo(u32 addr, bool restorecpsr)
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void ARMv5::JumpTo(u32 addr, bool restorecpsr)
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{
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if (restorecpsr)
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{
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@ -221,16 +176,28 @@ void ARM::JumpTo(u32 addr, bool restorecpsr)
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u32 oldregion = R[15] >> 23;
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u32 newregion = addr >> 23;
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//if(!Num)printf("ARM%c branch from %08X to %08X. %03X->%03X\n", Num?'7':'9', R[15], addr, oldregion, newregion);
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if (addr & 0x1)
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{
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addr &= ~0x1;
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R[15] = addr+2;
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if (newregion != oldregion) SetupCodeMem(addr);
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead16(addr);
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NextInstr[1] = CodeRead16(addr+2);
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// two-opcodes-at-once fetch
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// doesn't matter if we put garbage in the MSbs there
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if (addr & 0x2)
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{
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NextInstr[0] = CodeRead32(addr-2) >> 16;
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NextInstr[1] = CodeRead32(addr+2);
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Cycles += NDS::ARM9MemTimings[CodeRegion][2] * 2;
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}
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else
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{
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NextInstr[0] = CodeRead32(addr);
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NextInstr[1] = NextInstr[0] >> 16;
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Cycles += NDS::ARM9MemTimings[CodeRegion][2];
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}
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CPSR |= 0x20;
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}
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@ -239,10 +206,52 @@ void ARM::JumpTo(u32 addr, bool restorecpsr)
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addr &= ~0x3;
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R[15] = addr+4;
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if (newregion != oldregion) SetupCodeMem(addr);
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead32(addr);
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NextInstr[1] = CodeRead32(addr+4);
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Cycles += NDS::ARM9MemTimings[CodeRegion][2] * 2;
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CPSR &= ~0x20;
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}
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}
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void ARMv4::JumpTo(u32 addr, bool restorecpsr)
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{
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if (restorecpsr)
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{
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RestoreCPSR();
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if (CPSR & 0x20) addr |= 0x1;
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else addr &= ~0x1;
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}
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u32 oldregion = R[15] >> 23;
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u32 newregion = addr >> 23;
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if (addr & 0x1)
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{
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addr &= ~0x1;
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R[15] = addr+2;
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead16(addr);
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NextInstr[1] = CodeRead16(addr+2);
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Cycles += NDS::ARM7MemTimings[CodeRegion][0] + NDS::ARM7MemTimings[CodeRegion][1];
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CPSR |= 0x20;
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}
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else
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{
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addr &= ~0x3;
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R[15] = addr+4;
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//if (newregion != oldregion) SetupCodeMem(addr);
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NextInstr[0] = CodeRead32(addr);
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NextInstr[1] = CodeRead32(addr+4);
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Cycles += NDS::ARM7MemTimings[CodeRegion][2] + NDS::ARM7MemTimings[CodeRegion][3];
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CPSR &= ~0x20;
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}
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@ -373,7 +382,7 @@ void ARM::TriggerIRQ()
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JumpTo(ExceptionBase + 0x18);
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}
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s32 ARM::Execute()
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s32 ARMv5::Execute()
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{
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if (Halted)
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{
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@ -381,19 +390,102 @@ s32 ARM::Execute()
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{
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Halted = 0;
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}
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else if (NDS::HaltInterrupted(Num))
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else if (NDS::HaltInterrupted(0))
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{
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Halted = 0;
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if (NDS::IME[Num] & 0x1)
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if (NDS::IME[0] & 0x1)
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TriggerIRQ();
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}
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else
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{
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Cycles = CyclesToRun;
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NDS::RunTimingCriticalDevices(0, CyclesToRun >> ClockShift);
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return Cycles;
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}
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}
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if (Num == 0) NDS::RunTimingCriticalDevices(0, CyclesToRun >> 1);
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else NDS::RunTimingCriticalDevices(1, CyclesToRun);
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Cycles = 0;
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s32 lastcycles = 0;
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while (Cycles < CyclesToRun)
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{
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if (CPSR & 0x20) // THUMB
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{
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// prefetch
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R[15] += 2;
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CurInstr = NextInstr[0];
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NextInstr[0] = NextInstr[1];
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if (R[15] & 0x2) { NextInstr[1] >>= 16; CodeRegion = NDS::Region9_MAX; }
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else NextInstr[1] = CodeRead32(R[15]);
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// actually execute
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u32 icode = (CurInstr >> 6) & 0x3FF;
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ARMInterpreter::THUMBInstrTable[icode](this);
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}
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else
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{
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// prefetch
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R[15] += 4;
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CurInstr = NextInstr[0];
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NextInstr[0] = NextInstr[1];
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NextInstr[1] = CodeRead32(R[15]);
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// actually execute
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if (CheckCondition(CurInstr >> 28))
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{
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u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
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ARMInterpreter::ARMInstrTable[icode](this);
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}
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else if ((CurInstr & 0xFE000000) == 0xFA000000)
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{
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ARMInterpreter::A_BLX_IMM(this);
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}
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else
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AddCycles_C();
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}
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s32 diff = Cycles - lastcycles;
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NDS::RunTimingCriticalDevices(0, diff >> ClockShift);
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lastcycles = Cycles - (diff & ClockDiffMask);
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// TODO optimize this shit!!!
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if (Halted)
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{
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if (Halted == 1)
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Cycles = CyclesToRun;
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break;
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}
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if (NDS::IF[0] & NDS::IE[0])
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{
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if (NDS::IME[0] & 0x1)
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TriggerIRQ();
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}
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}
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if (Halted == 2)
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Halted = 0;
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return Cycles;
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}
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s32 ARMv4::Execute()
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{
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if (Halted)
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{
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if (Halted == 2)
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{
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Halted = 0;
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}
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else if (NDS::HaltInterrupted(1))
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{
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Halted = 0;
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if (NDS::IME[1] & 0x1)
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TriggerIRQ();
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}
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else
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{
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Cycles = CyclesToRun;
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NDS::RunTimingCriticalDevices(1, CyclesToRun);
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return Cycles;
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}
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}
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@ -429,15 +521,13 @@ s32 ARM::Execute()
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u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
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ARMInterpreter::ARMInstrTable[icode](this);
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}
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else if ((CurInstr & 0xFE000000) == 0xFA000000)
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{
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ARMInterpreter::A_BLX_IMM(this);
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}
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else
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AddCycles_C();
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}
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s32 diff = Cycles - lastcycles;
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NDS::RunTimingCriticalDevices(Num, diff >> ClockShift);
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lastcycles = Cycles - (diff & ClockDiffMask);
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NDS::RunTimingCriticalDevices(1, diff);
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lastcycles = Cycles;
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// TODO optimize this shit!!!
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if (Halted)
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@ -446,9 +536,9 @@ s32 ARM::Execute()
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Cycles = CyclesToRun;
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break;
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}
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if (NDS::IF[Num] & NDS::IE[Num])
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if (NDS::IF[1] & NDS::IE[1])
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{
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if (NDS::IME[Num] & 0x1)
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if (NDS::IME[1] & 0x1)
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TriggerIRQ();
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}
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}
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Reference in New Issue
Block a user