mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-23 06:10:03 -06:00
begin work on general timing renovation. way shitty because it behaves as if caches were off, so everything will be slow as shit.
This commit is contained in:
16
src/DMA.cpp
16
src/DMA.cpp
@ -246,12 +246,14 @@ s32 DMA::Run(s32 cycles)
|
||||
|
||||
if (!(Cnt & 0x04000000))
|
||||
{
|
||||
u16 (*readfn)(u32) = CPU ? NDS::ARM7Read16 : NDS::ARM9Read16;
|
||||
void (*writefn)(u32,u16) = CPU ? NDS::ARM7Write16 : NDS::ARM9Write16;
|
||||
int (*readfn)(u32,u32*) = CPU ? NDS::ARM7Read16 : NDS::ARM9Read16;
|
||||
int (*writefn)(u32,u16) = CPU ? NDS::ARM7Write16 : NDS::ARM9Write16;
|
||||
|
||||
while (IterCount > 0 && cycles > 0 && !Stall)
|
||||
{
|
||||
writefn(CurDstAddr, readfn(CurSrcAddr));
|
||||
u32 val;
|
||||
readfn(CurSrcAddr, &val);
|
||||
writefn(CurDstAddr, val);
|
||||
|
||||
s32 c = (Waitstates[0][(CurSrcAddr >> 24) & 0xF] + Waitstates[0][(CurDstAddr >> 24) & 0xF]);
|
||||
cycles -= c;
|
||||
@ -283,12 +285,14 @@ s32 DMA::Run(s32 cycles)
|
||||
}
|
||||
}*/
|
||||
|
||||
u32 (*readfn)(u32) = CPU ? NDS::ARM7Read32 : NDS::ARM9Read32;
|
||||
void (*writefn)(u32,u32) = CPU ? NDS::ARM7Write32 : NDS::ARM9Write32;
|
||||
int (*readfn)(u32,u32*) = CPU ? NDS::ARM7Read32 : NDS::ARM9Read32;
|
||||
int (*writefn)(u32,u32) = CPU ? NDS::ARM7Write32 : NDS::ARM9Write32;
|
||||
|
||||
while (IterCount > 0 && cycles > 0 && !Stall)
|
||||
{
|
||||
writefn(CurDstAddr, readfn(CurSrcAddr));
|
||||
u32 val;
|
||||
readfn(CurSrcAddr, &val);
|
||||
writefn(CurDstAddr, val);
|
||||
|
||||
s32 c = (Waitstates[1][(CurSrcAddr >> 24) & 0xF] + Waitstates[1][(CurDstAddr >> 24) & 0xF]);
|
||||
cycles -= c;
|
||||
|
Reference in New Issue
Block a user