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fix double data aborts with strd

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This commit is contained in:
Jaklyy 2024-06-05 10:28:51 -04:00
parent 317a8c61e5
commit 1871c48849
4 changed files with 8 additions and 8 deletions
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2
src/ARM.cpp
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@ -1217,7 +1217,7 @@ bool ARMv4::DataWrite32(u32 addr, u32 val)
return true; return true;
} }
bool ARMv4::DataWrite32S(u32 addr, u32 val) bool ARMv4::DataWrite32S(u32 addr, u32 val, bool dataabort)
{ {
addr &= ~3; addr &= ~3;

6
src/ARM.h
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@ -135,7 +135,7 @@ public:
virtual bool DataWrite8(u32 addr, u8 val) = 0; virtual bool DataWrite8(u32 addr, u8 val) = 0;
virtual bool DataWrite16(u32 addr, u16 val) = 0; virtual bool DataWrite16(u32 addr, u16 val) = 0;
virtual bool DataWrite32(u32 addr, u32 val) = 0; virtual bool DataWrite32(u32 addr, u32 val) = 0;
virtual bool DataWrite32S(u32 addr, u32 val) = 0; virtual bool DataWrite32S(u32 addr, u32 val, bool dataabort = false) = 0;
virtual void AddCycles_C() = 0; virtual void AddCycles_C() = 0;
virtual void AddCycles_CI(s32 numI) = 0; virtual void AddCycles_CI(s32 numI) = 0;
@ -256,7 +256,7 @@ public:
bool DataWrite8(u32 addr, u8 val) override; bool DataWrite8(u32 addr, u8 val) override;
bool DataWrite16(u32 addr, u16 val) override; bool DataWrite16(u32 addr, u16 val) override;
bool DataWrite32(u32 addr, u32 val) override; bool DataWrite32(u32 addr, u32 val) override;
bool DataWrite32S(u32 addr, u32 val) override; bool DataWrite32S(u32 addr, u32 val, bool dataabort = false) override;
void AddCycles_C() override void AddCycles_C() override
{ {
@ -405,7 +405,7 @@ public:
bool DataWrite8(u32 addr, u8 val) override; bool DataWrite8(u32 addr, u8 val) override;
bool DataWrite16(u32 addr, u16 val) override; bool DataWrite16(u32 addr, u16 val) override;
bool DataWrite32(u32 addr, u32 val) override; bool DataWrite32(u32 addr, u32 val) override;
bool DataWrite32S(u32 addr, u32 val) override; bool DataWrite32S(u32 addr, u32 val, bool dataabort = false) override;
void AddCycles_C() override; void AddCycles_C() override;
void AddCycles_CI(s32 num) override; void AddCycles_CI(s32 num) override;
void AddCycles_CDI() override; void AddCycles_CDI() override;

4
src/ARMInterpreter_LoadStore.cpp
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@ -273,7 +273,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
u32 r = (cpu->CurInstr>>12) & 0xF; \ u32 r = (cpu->CurInstr>>12) & 0xF; \
if (r&1) { r--; printf("!! MISALIGNED STRD %d\n", r+1); } \ if (r&1) { r--; printf("!! MISALIGNED STRD %d\n", r+1); } \
bool dataabort = !cpu->DataWrite32(offset, cpu->R[r ]); /* yes, this data abort behavior is on purpose */ \ bool dataabort = !cpu->DataWrite32(offset, cpu->R[r ]); /* yes, this data abort behavior is on purpose */ \
dataabort |= !cpu->DataWrite32S (offset+4, cpu->R[r+1]); /* no, i dont understand it either */ \ dataabort |= !cpu->DataWrite32S (offset+4, cpu->R[r+1], dataabort); /* no, i dont understand it either */ \
cpu->AddCycles_CD(); \ cpu->AddCycles_CD(); \
if (dataabort) return; \ if (dataabort) return; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
@ -284,7 +284,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
u32 r = (cpu->CurInstr>>12) & 0xF; \ u32 r = (cpu->CurInstr>>12) & 0xF; \
if (r&1) { r--; printf("!! MISALIGNED STRD_POST %d\n", r+1); } \ if (r&1) { r--; printf("!! MISALIGNED STRD_POST %d\n", r+1); } \
bool dataabort = !cpu->DataWrite32(addr, cpu->R[r ]); \ bool dataabort = !cpu->DataWrite32(addr, cpu->R[r ]); \
dataabort |= !cpu->DataWrite32S (addr+4, cpu->R[r+1]); \ dataabort |= !cpu->DataWrite32S (addr+4, cpu->R[r+1], dataabort); \
cpu->AddCycles_CD(); \ cpu->AddCycles_CD(); \
if (dataabort) return; \ if (dataabort) return; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;

4
src/CP15.cpp
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@ -1014,11 +1014,11 @@ bool ARMv5::DataWrite32(u32 addr, u32 val)
return true; return true;
} }
bool ARMv5::DataWrite32S(u32 addr, u32 val) bool ARMv5::DataWrite32S(u32 addr, u32 val, bool dataabort)
{ {
if (!(PU_Map[addr>>12] & 0x02)) if (!(PU_Map[addr>>12] & 0x02))
{ {
DataAbort(); if (!dataabort) DataAbort();
return false; return false;
} }