mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-31 18:20:01 -06:00
more fixes for flag optimisation
+ small cycle counting optimisation
This commit is contained in:
@ -19,6 +19,8 @@ void Compiler::Comp_JumpTo(u32 addr, bool forceNonConstantCycles)
|
||||
// it's not completely safe to assume stuff like, which instructions to preload
|
||||
// we'll see how it works out
|
||||
|
||||
IrregularCycles = true;
|
||||
|
||||
u32 newPC;
|
||||
u32 cycles = 0;
|
||||
|
||||
@ -140,6 +142,8 @@ void Compiler::Comp_JumpTo(u32 addr, bool forceNonConstantCycles)
|
||||
|
||||
void Compiler::Comp_JumpTo(Gen::X64Reg addr, bool restoreCPSR)
|
||||
{
|
||||
IrregularCycles = true;
|
||||
|
||||
BitSet16 hiRegsLoaded(RegCache.DirtyRegs & 0xFF00);
|
||||
bool previouslyDirty = CPSRDirty;
|
||||
SaveCPSR();
|
||||
|
@ -447,6 +447,8 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
|
||||
Comp_AddCycles_C();
|
||||
else
|
||||
{
|
||||
IrregularCycles = false;
|
||||
|
||||
FixupBranch skipExecute;
|
||||
if (cond < 0xE)
|
||||
skipExecute = CheckCondition(cond);
|
||||
@ -463,13 +465,19 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
|
||||
|
||||
if (CurInstr.Cond() < 0xE)
|
||||
{
|
||||
FixupBranch skipFailed = J();
|
||||
SetJumpTarget(skipExecute);
|
||||
if (IrregularCycles)
|
||||
{
|
||||
FixupBranch skipFailed = J();
|
||||
SetJumpTarget(skipExecute);
|
||||
|
||||
Comp_AddCycles_C();
|
||||
Comp_AddCycles_C(true);
|
||||
|
||||
SetJumpTarget(skipFailed);
|
||||
SetJumpTarget(skipFailed);
|
||||
}
|
||||
else
|
||||
SetJumpTarget(skipExecute);
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@ -518,8 +526,16 @@ void Compiler::Comp_AddCycles_CI(Gen::X64Reg i, int add)
|
||||
NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
|
||||
: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles);
|
||||
|
||||
LEA(32, RSCRATCH, MDisp(i, add + cycles));
|
||||
ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(RSCRATCH));
|
||||
if (!Thumb && CurInstr.Cond() < 0xE)
|
||||
{
|
||||
LEA(32, RSCRATCH, MDisp(i, add + cycles));
|
||||
ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(RSCRATCH));
|
||||
}
|
||||
else
|
||||
{
|
||||
ConstantCycles += i + cycles;
|
||||
ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(i));
|
||||
}
|
||||
}
|
||||
|
||||
}
|
@ -139,6 +139,8 @@ public:
|
||||
u8* ResetStart;
|
||||
u32 CodeMemSize;
|
||||
|
||||
bool IrregularCycles;
|
||||
|
||||
void* MemoryFuncs9[3][2];
|
||||
void* MemoryFuncs7[3][2][2];
|
||||
|
||||
|
@ -438,6 +438,8 @@ void* Compiler::Gen_MemoryRoutineSeq7(bool store, bool preinc, bool codeMainRAM)
|
||||
|
||||
void Compiler::Comp_MemAccess(OpArg rd, bool signExtend, bool store, int size)
|
||||
{
|
||||
IrregularCycles = true;
|
||||
|
||||
if (store)
|
||||
MOV(32, R(ABI_PARAM2), rd);
|
||||
u32 cycles = Num
|
||||
@ -459,6 +461,8 @@ void Compiler::Comp_MemAccess(OpArg rd, bool signExtend, bool store, int size)
|
||||
|
||||
s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc, bool decrement, bool usermode)
|
||||
{
|
||||
IrregularCycles = true;
|
||||
|
||||
int regsCount = regs.Count();
|
||||
|
||||
if (decrement)
|
||||
|
Reference in New Issue
Block a user