abandon pipelining on jit

fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
This commit is contained in:
RSDuck
2019-08-17 16:50:48 +02:00
parent 26ecf6bb3c
commit 316378092a
6 changed files with 69 additions and 33 deletions

View File

@ -23,6 +23,7 @@
#include "ARMInterpreter.h"
#include "AREngine.h"
#include "ARMJIT.h"
#include "Config.h"
// instruction timing notes
@ -168,6 +169,13 @@ void ARM::DoSavestate(Savestate* file)
file->VarArray(R_IRQ, 3*sizeof(u32));
file->VarArray(R_UND, 3*sizeof(u32));
file->Var32(&CurInstr);
if (!file->Saving && Config::JIT_Enable)
{
// hack, the JIT doesn't really pipeline
// but we still want JIT save states to be
// loaded while running the interpreter
FillPipeline();
}
file->VarArray(NextInstr, 2*sizeof(u32));
file->Var32(&ExceptionBase);
@ -767,4 +775,40 @@ void ARMv4::ExecuteJIT()
if (Halted == 2)
Halted = 0;
}
#endif
#endif
void ARMv5::FillPipeline()
{
if (CPSR & 0x20)
{
if ((R[15] - 2) & 0x2)
{
NextInstr[0] = CodeRead32(R[15] - 4, false) >> 16;
NextInstr[1] = CodeRead32(R[15], false);
}
else
{
NextInstr[0] = CodeRead32(R[15] - 2, false);
NextInstr[1] = NextInstr[0] >> 16;
}
}
else
{
NextInstr[0] = CodeRead32(R[15] - 4, false);
NextInstr[1] = CodeRead32(R[15], false);
}
}
void ARMv4::FillPipeline()
{
if (CPSR & 0x20)
{
NextInstr[0] = CodeRead16(R[15] - 2);
NextInstr[1] = CodeRead16(R[15]);
}
else
{
NextInstr[0] = CodeRead32(R[15] - 4);
NextInstr[1] = CodeRead32(R[15]);
}
}