mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-23 22:29:47 -06:00
* somewhat proper event scheduler
* support for timers * fixes, additions, shit
This commit is contained in:
StapleButter
342
NDS.cpp
342
NDS.cpp
@ -9,10 +9,17 @@
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namespace NDS
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{
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SchedEvent SchedBuffer[SCHED_BUF_LEN];
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SchedEvent* SchedQueue;
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bool NeedReschedule;
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ARM* ARM9;
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ARM* ARM7;
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s32 ARM9Cycles, ARM7Cycles;
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s32 CompensatedCycles;
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s32 SchedCycles;
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u8 ARM9BIOS[0x1000];
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u8 ARM7BIOS[0x4000];
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@ -37,8 +44,12 @@ u32 ARM9DTCMBase, ARM9DTCMSize;
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u32 IME[2];
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u32 IE[2], IF[2];
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Timer Timers[8];
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u16 IPCSync9, IPCSync7;
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u16 _soundbias; // temp
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bool Running;
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@ -103,10 +114,18 @@ void Reset()
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ARM7->Reset();
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CP15::Reset();
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memset(Timers, 0, 8*sizeof(Timer));
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SPI::Reset();
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memset(SchedBuffer, 0, sizeof(SchedEvent)*SCHED_BUF_LEN);
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SchedQueue = NULL;
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ARM9Cycles = 0;
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ARM7Cycles = 0;
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SchedCycles = 0;
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_soundbias = 0;
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Running = true; // hax
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}
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@ -116,17 +135,144 @@ void RunFrame()
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{
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s32 framecycles = 560190<<1;
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// very gross and temp. loop
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const s32 maxcycles = 16;
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while (Running && framecycles>0)
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{
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ARM9Cycles = ARM9->Execute(32 + ARM9Cycles);
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ARM7Cycles = ARM7->Execute(16 + ARM7Cycles);
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//ARM9Cycles = ARM9->Execute(32 + ARM9Cycles);
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//ARM7Cycles = ARM7->Execute(16 + ARM7Cycles);
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framecycles -= 32;
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//framecycles -= 32;
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s32 cyclestorun = maxcycles;
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// TODO: scheduler integration here
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CompensatedCycles = ARM9Cycles;
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s32 c9 = ARM9->Execute(cyclestorun - ARM9Cycles);
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ARM9Cycles = c9 - cyclestorun;
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c9 -= CompensatedCycles;
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s32 c7 = ARM7->Execute((c9 - ARM7Cycles) >> 1) << 1;
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ARM7Cycles = c7 - c9;
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RunEvents(c9);
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framecycles -= cyclestorun;
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}
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}
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SchedEvent* ScheduleEvent(s32 Delay, void (*Func)(u32), u32 Param)
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{
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// find a free entry
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u32 entry = -1;
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for (int i = 0; i < SCHED_BUF_LEN; i++)
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{
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if (SchedBuffer[i].Func == NULL)
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{
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entry = i;
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break;
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}
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}
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if (entry == -1)
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{
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printf("!! SCHEDULER BUFFER FULL\n");
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return NULL;
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}
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SchedEvent* evt = &SchedBuffer[entry];
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evt->Func = Func;
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evt->Param = Param;
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SchedEvent* cur = SchedQueue;
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SchedEvent* prev = NULL;
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for (;;)
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{
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if (cur == NULL) break;
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if (cur->Delay > Delay) break;
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Delay -= cur->Delay;
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prev = cur;
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cur = cur->NextEvent;
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}
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// so, we found it. we insert our event before 'cur'.
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evt->Delay = Delay;
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if (cur == NULL)
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{
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if (prev == NULL)
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{
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// list empty
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SchedQueue = evt;
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evt->PrevEvent = NULL;
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evt->NextEvent = NULL;
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}
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else
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{
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// inserting at the end of the list
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evt->PrevEvent = prev;
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evt->NextEvent = NULL;
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prev->NextEvent = evt;
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}
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}
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else
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{
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evt->NextEvent = cur;
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evt->PrevEvent = cur->PrevEvent;
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if (evt->PrevEvent)
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evt->PrevEvent->NextEvent = evt;
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cur->PrevEvent = evt;
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cur->Delay -= evt->Delay;
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}
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return evt;
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}
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void CancelEvent(SchedEvent* event)
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{
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event->Func = NULL;
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// unlink
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if (event->PrevEvent)
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event->PrevEvent->NextEvent = event->NextEvent;
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else
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SchedQueue = event->NextEvent;
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if (event->NextEvent)
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event->NextEvent->PrevEvent = event->PrevEvent;
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}
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void RunEvents(s32 cycles)
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{
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SchedCycles += cycles;
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SchedEvent* evt = SchedQueue;
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while (evt && evt->Delay <= SchedCycles)
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{
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evt->Func(evt->Param);
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evt->Func = NULL;
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SchedCycles -= evt->Delay;
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evt = evt->NextEvent;
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}
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SchedQueue = evt;
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if (evt) evt->PrevEvent = NULL;
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}
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void CompensateARM7()
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{
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s32 c9 = ARM9->Cycles - CompensatedCycles;
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CompensatedCycles = ARM9->Cycles;
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s32 c7 = ARM7->Execute((c9 - ARM7Cycles) >> 1) << 1;
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ARM7Cycles = c7 - c9;
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RunEvents(c9);
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}
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void Halt()
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{
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@ -182,6 +328,73 @@ void TriggerIRQ(u32 cpu, u32 irq)
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const s32 TimerPrescaler[4] = {2, 128, 512, 2048};
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void TimerIncrement(u32 param)
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{
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Timer* timer = &Timers[param];
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u32 tid = param & 0x3;
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u32 cpu = param >> 2;
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for (;;)
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{
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timer->Counter++;
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if (param==7)printf("timer%d increment %04X %04X %04X\n", param, timer->Control, timer->Counter, timer->Reload);
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if (tid == (param&0x3))
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timer->Event = ScheduleEvent(TimerPrescaler[timer->Control&0x3], TimerIncrement, param);
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if (timer->Counter == 0)
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{
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timer->Counter = timer->Reload;
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if (timer->Control & (1<<6))
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TriggerIRQ(cpu, IRQ_Timer0 + tid);
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// cascade
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if (tid == 3)
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break;
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timer++;
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if ((timer->Control & 0x84) != 0x84)
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break;
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tid++;
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continue;
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}
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break;
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}
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}
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void TimerStart(u32 id, u16 cnt)
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{
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Timer* timer = &Timers[id];
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u16 curstart = timer->Control & (1<<7);
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u16 newstart = cnt & (1<<7);
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printf("timer%d start: %04X %04X\n", id, timer->Control, cnt);
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timer->Control = cnt;
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if ((!curstart) && newstart)
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{
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// start the timer, if it's not a cascading timer
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if (!(cnt & (1<<2)))
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{
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timer->Counter = timer->Reload;
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timer->Event = ScheduleEvent(TimerPrescaler[cnt&0x3], TimerIncrement, id);
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}
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else
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timer->Event = NULL;
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}
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else if (curstart && !newstart)
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{
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if (timer->Event)
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CancelEvent(timer->Event);
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}
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}
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u8 ARM9Read8(u32 addr)
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{
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if ((addr & 0xFFFFF000) == 0xFFFF0000)
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@ -245,6 +458,15 @@ u16 ARM9Read16(u32 addr)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: return Timers[0].Counter;
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case 0x04000102: return Timers[0].Control;
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case 0x04000104: return Timers[1].Counter;
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case 0x04000106: return Timers[1].Control;
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case 0x04000108: return Timers[2].Counter;
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case 0x0400010A: return Timers[2].Control;
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case 0x0400010C: return Timers[3].Counter;
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case 0x0400010E: return Timers[3].Control;
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case 0x04000180: return IPCSync9;
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}
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}
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@ -268,6 +490,20 @@ u32 ARM9Read32(u32 addr)
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return *(u32*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF];
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}
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if (addr >= 0xFFFF1000)
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{
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Halt();
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/*FILE* f = fopen("ram.bin", "wb");
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fwrite(MainRAM, 0x400000, 1, f);
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fclose(f);
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fopen("wram.bin", "wb");
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fwrite(ARM7WRAM, 0x10000, 1, f);
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fclose(f);
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fopen("swram.bin", "wb");
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fwrite(ARM7WRAM, 0x8000, 1, f);
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fclose(f);*/
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}
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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@ -280,13 +516,18 @@ u32 ARM9Read32(u32 addr)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: return Timers[0].Counter | (Timers[0].Control << 16);
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case 0x04000104: return Timers[1].Counter | (Timers[1].Control << 16);
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case 0x04000108: return Timers[2].Counter | (Timers[2].Control << 16);
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case 0x0400010C: return Timers[3].Counter | (Timers[3].Control << 16);
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case 0x04000208: return IME[0];
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case 0x04000210: return IE[0];
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case 0x04000214: return IF[0];
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}
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}
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printf("unknown arm9 read32 %08X | %08X\n", addr, ARM9->R[15]);
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printf("unknown arm9 read32 %08X | %08X %08X %08X\n", addr, ARM9->R[15], ARM9->R[12], ARM9Read32(0x027FF820));
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return 0;
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}
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@ -352,6 +593,15 @@ void ARM9Write16(u32 addr, u16 val)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: Timers[0].Reload = val; return;
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case 0x04000102: TimerStart(0, val); return;
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case 0x04000104: Timers[1].Reload = val; return;
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case 0x04000106: TimerStart(1, val); return;
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case 0x04000108: Timers[2].Reload = val; return;
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case 0x0400010A: TimerStart(2, val); return;
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case 0x0400010C: Timers[3].Reload = val; return;
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case 0x0400010E: TimerStart(3, val); return;
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case 0x04000180:
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IPCSync7 &= 0xFFF0;
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IPCSync7 |= ((val & 0x0F00) >> 8);
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@ -361,6 +611,7 @@ void ARM9Write16(u32 addr, u16 val)
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{
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TriggerIRQ(1, IRQ_IPCSync);
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}
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CompensateARM7();
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return;
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}
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}
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@ -394,6 +645,23 @@ void ARM9Write32(u32 addr, u32 val)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100:
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Timers[0].Reload = val & 0xFFFF;
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TimerStart(0, val>>16);
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return;
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case 0x04000104:
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Timers[1].Reload = val & 0xFFFF;
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TimerStart(1, val>>16);
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return;
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case 0x04000108:
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Timers[2].Reload = val & 0xFFFF;
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TimerStart(2, val>>16);
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return;
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case 0x0400010C:
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Timers[3].Reload = val & 0xFFFF;
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TimerStart(3, val>>16);
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return;
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case 0x04000208: IME[0] = val; return;
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case 0x04000210: IE[0] = val; return;
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case 0x04000214: IF[0] &= ~val; return;
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@ -462,14 +730,25 @@ u16 ARM7Read16(u32 addr)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: return Timers[4].Counter;
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case 0x04000102: return Timers[4].Control;
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case 0x04000104: return Timers[5].Counter;
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case 0x04000106: return Timers[5].Control;
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case 0x04000108: return Timers[6].Counter;
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case 0x0400010A: return Timers[6].Control;
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case 0x0400010C: return Timers[7].Counter;
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case 0x0400010E: return Timers[7].Control;
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case 0x04000180: return IPCSync7;
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case 0x040001C0: return SPI::ReadCnt();
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case 0x040001C2: return SPI::ReadData();
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case 0x04000504: return _soundbias;
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}
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}
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printf("unknown arm7 read16 %08X\n", addr);
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printf("unknown arm7 read16 %08X %08X\n", addr, ARM7->R[15]);
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return 0;
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}
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@ -495,6 +774,11 @@ u32 ARM7Read32(u32 addr)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: return Timers[4].Counter | (Timers[4].Control << 16);
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case 0x04000104: return Timers[5].Counter | (Timers[5].Control << 16);
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case 0x04000108: return Timers[6].Counter | (Timers[6].Control << 16);
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case 0x0400010C: return Timers[7].Counter | (Timers[7].Control << 16);
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case 0x040001A4:
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return 0x00800000; // hax
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@ -507,6 +791,7 @@ u32 ARM7Read32(u32 addr)
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}
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}
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if ((addr&0xFF000000) == 0xEA000000) Halt();
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printf("unknown arm7 read32 %08X | %08X\n", addr, ARM7->R[15]);
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return 0;
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}
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@ -545,6 +830,19 @@ void ARM7Write8(u32 addr, u8 val)
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}
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}
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if (addr==0xA20)
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{
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/*FILE* f = fopen("ram.bin", "wb");
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fwrite(MainRAM, 0x400000, 1, f);
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fclose(f);
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fopen("wram.bin", "wb");
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fwrite(ARM7WRAM, 0x10000, 1, f);
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fclose(f);
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fopen("swram.bin", "wb");
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fwrite(ARM7WRAM, 0x8000, 1, f);
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fclose(f);*/
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}
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printf("unknown arm7 write8 %08X %02X | %08X | %08X %08X %08X %08X\n", addr, val, ARM7->R[15], IME[1], IE[1], ARM7->R[0], ARM7->R[1]);
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}
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@ -568,6 +866,15 @@ void ARM7Write16(u32 addr, u16 val)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100: Timers[4].Reload = val; return;
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case 0x04000102: TimerStart(4, val); return;
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case 0x04000104: Timers[5].Reload = val; return;
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case 0x04000106: TimerStart(5, val); return;
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case 0x04000108: Timers[6].Reload = val; return;
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case 0x0400010A: TimerStart(6, val); return;
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case 0x0400010C: Timers[7].Reload = val; return;
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case 0x0400010E: TimerStart(7, val); return;
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case 0x04000180:
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IPCSync9 &= 0xFFF0;
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IPCSync9 |= ((val & 0x0F00) >> 8);
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@ -586,6 +893,10 @@ void ARM7Write16(u32 addr, u16 val)
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case 0x040001C2:
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SPI::WriteData(val & 0xFF);
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return;
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case 0x04000504:
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_soundbias = val & 0x3FF;
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return;
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}
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}
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@ -612,13 +923,30 @@ void ARM7Write32(u32 addr, u32 val)
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case 0x04000000:
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switch (addr)
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{
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case 0x04000100:
|
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Timers[4].Reload = val & 0xFFFF;
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TimerStart(4, val>>16);
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return;
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case 0x04000104:
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Timers[5].Reload = val & 0xFFFF;
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TimerStart(5, val>>16);
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return;
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case 0x04000108:
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Timers[6].Reload = val & 0xFFFF;
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TimerStart(6, val>>16);
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return;
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case 0x0400010C:
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Timers[7].Reload = val & 0xFFFF;
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TimerStart(7, val>>16);
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return;
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case 0x04000208: IME[1] = val; return;
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case 0x04000210: IE[1] = val; return;
|
||||
case 0x04000214: IF[1] &= ~val; printf("IRQ ack %08X\n", val);return;
|
||||
}
|
||||
}
|
||||
|
||||
printf("unknown arm7 write32 %08X %08X | %08X\n", addr, val, ARM7->R[15]);
|
||||
printf("unknown arm7 write32 %08X %08X | %08X %08X\n", addr, val, ARM7->R[15], ARM7->CurInstr);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user