mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-26 07:39:56 -06:00
implement block linking + some refactoring
currently only supported for x64
This commit is contained in:
@ -1,6 +1,7 @@
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#include "ARMJIT_Compiler.h"
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#include "../ARMInterpreter.h"
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#include "../Config.h"
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#include <assert.h>
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@ -15,6 +16,8 @@
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using namespace Gen;
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extern "C" void ARM_Ret();
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namespace ARMJIT
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{
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template <>
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@ -170,6 +173,24 @@ Compiler::Compiler()
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RET();
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}
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{
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CPSRDirty = true;
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BranchStub[0] = GetWritableCodePtr();
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SaveCPSR();
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MOV(64, R(ABI_PARAM1), R(RCPU));
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CALL((u8*)ARMJIT::LinkBlock<0>);
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LoadCPSR();
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JMP((u8*)ARM_Ret, true);
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CPSRDirty = true;
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BranchStub[1] = GetWritableCodePtr();
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SaveCPSR();
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MOV(64, R(ABI_PARAM1), R(RCPU));
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CALL((u8*)ARMJIT::LinkBlock<1>);
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LoadCPSR();
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JMP((u8*)ARM_Ret, true);
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}
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// move the region forward to prevent overwriting the generated functions
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CodeMemSize -= GetWritableCodePtr() - ResetStart;
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ResetStart = GetWritableCodePtr();
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@ -362,23 +383,43 @@ void Compiler::Reset()
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SetCodePtr(ResetStart);
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}
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void Compiler::Comp_SpecialBranchBehaviour()
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void Compiler::Comp_SpecialBranchBehaviour(bool taken)
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{
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if (CurInstr.BranchFlags & branch_IdleBranch)
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OR(32, MDisp(RCPU, offsetof(ARM, IdleLoop)), Imm8(0x1));
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if (taken && CurInstr.BranchFlags & branch_IdleBranch)
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OR(8, MDisp(RCPU, offsetof(ARM, IdleLoop)), Imm8(0x1));
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if (CurInstr.BranchFlags & branch_FollowCondNotTaken)
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if ((CurInstr.BranchFlags & branch_FollowCondNotTaken && taken)
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|| (CurInstr.BranchFlags & branch_FollowCondTaken && !taken))
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{
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RegCache.PrepareExit();
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SaveCPSR(false);
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MOV(32, R(RAX), Imm32(ConstantCycles));
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ABI_PopRegistersAndAdjustStack(BitSet32(ABI_ALL_CALLEE_SAVED & ABI_ALL_GPRS & ~BitSet32({RSP})), 8);
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RET();
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm32(ConstantCycles));
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if (Config::JIT_BrancheOptimisations == 2 && !(CurInstr.BranchFlags & branch_IdleBranch)
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&& (!taken || (CurInstr.BranchFlags & branch_StaticTarget)))
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{
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FixupBranch ret = J_CC(CC_S);
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CMP(32, MDisp(RCPU, offsetof(ARM, StopExecution)), Imm8(0));
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FixupBranch ret2 = J_CC(CC_NZ);
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u8* rewritePart = GetWritableCodePtr();
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NOP(5);
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MOV(32, R(ABI_PARAM2), Imm32(rewritePart - ResetStart));
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JMP((u8*)BranchStub[Num], true);
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SetJumpTarget(ret);
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SetJumpTarget(ret2);
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JMP((u8*)ARM_Ret, true);
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}
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else
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{
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JMP((u8*)&ARM_Ret, true);
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}
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}
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}
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JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[], int instrsCount)
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JitBlockEntry Compiler::CompileBlock(u32 translatedAddr, ARM* cpu, bool thumb, FetchedInstr instrs[], int instrsCount)
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{
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if (CodeMemSize - (GetWritableCodePtr() - ResetStart) < 1024 * 32) // guess...
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ResetBlockCache();
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@ -388,15 +429,11 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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Num = cpu->Num;
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CodeRegion = instrs[0].Addr >> 24;
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CurCPU = cpu;
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// CPSR might have been modified in a previous block
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CPSRDirty = Config::JIT_BrancheOptimisations == 2;
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JitBlockEntry res = (JitBlockEntry)GetWritableCodePtr();
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ABI_PushRegistersAndAdjustStack(BitSet32(ABI_ALL_CALLEE_SAVED & ABI_ALL_GPRS & ~BitSet32({RSP})), 8);
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MOV(64, R(RCPU), ImmPtr(cpu));
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LoadCPSR();
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RegCache = RegisterCache<Compiler, X64Reg>(this, instrs, instrsCount);
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for (int i = 0; i < instrsCount; i++)
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@ -474,7 +511,7 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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else
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(this->*comp)();
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Comp_SpecialBranchBehaviour();
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Comp_SpecialBranchBehaviour(true);
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if (CurInstr.Cond() < 0xE)
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{
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@ -485,15 +522,7 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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Comp_AddCycles_C(true);
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if (CurInstr.BranchFlags & branch_FollowCondTaken)
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{
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RegCache.PrepareExit();
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SaveCPSR(false);
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MOV(32, R(RAX), Imm32(ConstantCycles));
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ABI_PopRegistersAndAdjustStack(BitSet32(ABI_ALL_CALLEE_SAVED & ABI_ALL_GPRS & ~BitSet32({RSP})), 8);
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RET();
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}
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Comp_SpecialBranchBehaviour(false);
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SetJumpTarget(skipFailed);
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}
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@ -504,17 +533,38 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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}
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}
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if (comp == NULL && i != instrsCount - 1)
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if (comp == NULL)
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LoadCPSR();
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}
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RegCache.Flush();
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SaveCPSR();
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MOV(32, R(RAX), Imm32(ConstantCycles));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm32(ConstantCycles));
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ABI_PopRegistersAndAdjustStack(BitSet32(ABI_ALL_CALLEE_SAVED & ABI_ALL_GPRS & ~BitSet32({RSP})), 8);
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RET();
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if (Config::JIT_BrancheOptimisations == 2
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&& !(instrs[instrsCount - 1].BranchFlags & branch_IdleBranch)
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&& (!instrs[instrsCount - 1].Info.Branches()
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|| instrs[instrsCount - 1].BranchFlags & branch_FollowCondNotTaken
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|| (instrs[instrsCount - 1].BranchFlags & branch_FollowCondTaken && instrs[instrsCount - 1].BranchFlags & branch_StaticTarget)))
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{
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FixupBranch ret = J_CC(CC_S);
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CMP(32, MDisp(RCPU, offsetof(ARM, StopExecution)), Imm8(0));
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FixupBranch ret2 = J_CC(CC_NZ);
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u8* rewritePart = GetWritableCodePtr();
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NOP(5);
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MOV(32, R(ABI_PARAM2), Imm32(rewritePart - ResetStart));
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JMP((u8*)BranchStub[Num], true);
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SetJumpTarget(ret);
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SetJumpTarget(ret2);
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JMP((u8*)ARM_Ret, true);
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}
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else
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{
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JMP((u8*)ARM_Ret, true);
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}
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/*FILE* codeout = fopen("codeout", "a");
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fprintf(codeout, "beginning block argargarg__ %x!!!", instrs[0].Addr);
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@ -525,6 +575,22 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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return res;
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}
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void Compiler::LinkBlock(u32 offset, JitBlockEntry entry)
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{
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u8* curPtr = GetWritableCodePtr();
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SetCodePtr(ResetStart + offset);
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JMP((u8*)entry, true);
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SetCodePtr(curPtr);
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}
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void Compiler::UnlinkBlock(u32 offset)
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{
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u8* curPtr = GetWritableCodePtr();
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SetCodePtr(ResetStart + offset);
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NOP(5);
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SetCodePtr(curPtr);
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}
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void Compiler::Comp_AddCycles_C(bool forceNonConstant)
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{
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s32 cycles = Num ?
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@ -532,7 +598,7 @@ void Compiler::Comp_AddCycles_C(bool forceNonConstant)
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: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles);
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if ((!Thumb && CurInstr.Cond() < 0xE) || forceNonConstant)
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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else
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ConstantCycles += cycles;
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}
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@ -544,7 +610,7 @@ void Compiler::Comp_AddCycles_CI(u32 i)
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: ((R15 & 0x2) ? 0 : CurInstr.CodeCycles)) + i;
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if (!Thumb && CurInstr.Cond() < 0xE)
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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else
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ConstantCycles += cycles;
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}
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@ -558,12 +624,12 @@ void Compiler::Comp_AddCycles_CI(Gen::X64Reg i, int add)
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if (!Thumb && CurInstr.Cond() < 0xE)
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{
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LEA(32, RSCRATCH, MDisp(i, add + cycles));
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(RSCRATCH));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(RSCRATCH));
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}
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else
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{
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ConstantCycles += i + cycles;
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(i));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), R(i));
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}
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}
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@ -599,7 +665,7 @@ void Compiler::Comp_AddCycles_CDI()
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}
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if (!Thumb && CurInstr.Cond() < 0xE)
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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else
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ConstantCycles += cycles;
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}
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@ -643,7 +709,7 @@ void Compiler::Comp_AddCycles_CD()
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}
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if (IrregularCycles && !Thumb && CurInstr.Cond() < 0xE)
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ADD(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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SUB(32, MDisp(RCPU, offsetof(ARM, Cycles)), Imm8(cycles));
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else
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ConstantCycles += cycles;
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}
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