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https://github.com/melonDS-emu/melonDS.git
synced 2024-11-14 13:27:41 -07:00
wifi: proper TX/RX status switch and RX check
readme: little update
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@ -15,7 +15,10 @@ melonDS requires BIOS/firmware copies from a DS. Files required:
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* bios9.bin, 4KB: ARM9 BIOS
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* firmware.bin, 256KB: firmware
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Note: the DS-mode firmware in the 3DS isn't bootable, it only contains the bare minimum to run games.
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Firmware boot requires a firmware dump from an original DS or DS Lite.
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DS firmwares dumped from a DSi or 3DS aren't bootable and only contain configuration data, thus they are only suitable when booting games directly.
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DS BIOS dumps from a 3DS can be used with no compatibility issues. DSi BIOS dumps should be usable too, provided they were dumped properly.
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As for the rest, the interface should be pretty straightforward. If you have a question, don't hesitate to ask, though!
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160
src/Wifi.cpp
160
src/Wifi.cpp
@ -67,6 +67,10 @@ u8 RXBuffer[2048];
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u32 RXTime;
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u16 RXEndAddr;
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u32 ComStatus; // 0=waiting for packets 1=receiving 2=sending
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u32 TXCurSlot;
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u32 RXCounter;
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bool MPInited;
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@ -75,10 +79,11 @@ bool MPInited;
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// 1. preamble
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// 2. IRQ7
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// 3. send data
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// 4. wait for client replies (duration: 112 + ((10 * CMD_REPLYTIME) * numclients))
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// 5. IRQ7
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// 6. send ack (16 bytes, 1Mbps)
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// 7. optional IRQ1, along with IRQ12 if the transfer was successful or if
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// 4. optional IRQ1
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// 5. wait for client replies (duration: 112 + ((10 * CMD_REPLYTIME) * numclients))
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// 6. IRQ7
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// 7. send ack (16 bytes, 1Mbps)
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// 8. optional IRQ1, along with IRQ12 if the transfer was successful or if
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// there's no time left for a retry
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//
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// if the transfer has to be retried (for example, didn't get replies from all clients)
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@ -89,14 +94,14 @@ bool MPInited;
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//
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// RFSTATUS values:
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// 0 = initial
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// 1 = RX????
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// 1 = waiting for incoming packets
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// 2 = switching from RX to TX
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// 3 = TX
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// 4 = switching from TX to RX
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// 5 = MP host data sent, waiting for replies (RFPINS=0x0084)
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// 6 = RX
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// 7 = ??
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// 8 = MP host sending ack (RFPINS=0x0046)
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// 8 = MP client sending reply, MP host sending ack (RFPINS=0x0046)
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// 9 = idle
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@ -176,6 +181,10 @@ void Reset()
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USCompare = 0;
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BlockBeaconIRQ14 = false;
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ComStatus = 0;
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TXCurSlot = -1;
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RXCounter = 0;
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CmdCounter = 0;
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}
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@ -427,12 +436,12 @@ u32 NumClients(u16 bitmask)
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return ret;
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}
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void CheckRX(bool block);
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bool CheckRX(bool block);
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void ProcessTX(TXSlot* slot, int num)
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bool ProcessTX(TXSlot* slot, int num)
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{
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slot->CurPhaseTime--;
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if (slot->CurPhaseTime > 0) return;
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if (slot->CurPhaseTime > 0) return false;
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switch (slot->CurPhase)
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{
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@ -448,13 +457,13 @@ void ProcessTX(TXSlot* slot, int num)
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// CHECKME
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// hardware seems to do this automatically?
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// I saw it done on captured packets, but saw no code to do it
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if (num == 1)
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/*if (num == 1)
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{
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if (slot->Length > 32)
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{
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*(u16*)&RAM[slot->Addr + 0xC + (slot->Length-6)] = *(u16*)&RAM[slot->Addr + 0x26];
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}
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}
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}*/
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if (num != 5) SetIRQ(7);
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*(u16*)&RAM[slot->Addr + 0xC + 22] = IOPORT(W_TXSeqNo) << 4;
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@ -480,7 +489,7 @@ void ProcessTX(TXSlot* slot, int num)
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slot->CurPhase = 2;
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slot->CurPhaseTime = 112 + ((10 + IOPORT(W_CmdReplyTime)) * nclients);
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printf("tx done. listen to replies\n");
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CheckRX(true);
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if (CheckRX(true)) ComStatus |= 0x2;
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// TODO: RFSTATUS/RFPINS
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@ -517,7 +526,7 @@ printf("tx done. listen to replies\n");
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FireTX();
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}
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break;
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return true;
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case 2: // MP host transfer done
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{
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@ -554,43 +563,43 @@ printf("tx done. listen to replies\n");
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printf("MP TX over\n");
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FireTX();
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}
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break;
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return true;
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}
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return false;
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}
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void CheckRX(bool block)
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bool CheckRX(bool block)
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{
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if (!(IOPORT(W_RXCnt) & 0x8000))
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return;
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return false;
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u16 framelen;
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u16 framectl;
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u8 txrate;
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bool bssidmatch;
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u16 rxflags;
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for (;;)
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{
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int rxlen = Platform::MP_RecvPacket(RXBuffer, block);
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if (rxlen < 12+24) return;
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if (rxlen == 0) return false;
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if (rxlen < 12+24) continue;
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u16 framelen = *(u16*)&RXBuffer[10];
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framelen = *(u16*)&RXBuffer[10];
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if (framelen != rxlen-12)
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{
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printf("bad frame length\n");
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return;
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continue;
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}
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framelen -= 4;
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/*if (RXTime > 0)
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{
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printf("!! getting packet while already receiving\n");
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return;
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}
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if (IOPORT(W_TXBusy) & 0x9D)
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{
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printf("!! getting packet while sending\n");
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return;
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}*/
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u16 framectl = *(u16*)&RXBuffer[12+0];
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u8 txrate = RXBuffer[8];
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framectl = *(u16*)&RXBuffer[12+0];
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txrate = RXBuffer[8];
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u32 a_src, a_dst, a_bss;
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u16 rxflags = 0x0010;
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rxflags = 0x0010;
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switch (framectl & 0x000C)
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{
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case 0x0000: // management
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@ -603,7 +612,7 @@ void CheckRX(bool block)
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case 0x0004: // control
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printf("blarg\n");
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return;
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continue;
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case 0x0008: // data
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switch (framectl & 0x0300)
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@ -625,7 +634,7 @@ void CheckRX(bool block)
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break;
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case 0x0300: // DS to DS
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printf("blarg\n");
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return;
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continue;
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}
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framectl &= 0xE7FF;
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if (framectl == 0x0228) rxflags |= 0x000C;
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@ -637,20 +646,24 @@ void CheckRX(bool block)
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}
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if (MACEqual(&RXBuffer[12 + a_src], (u8*)&IOPORT(W_MACAddr0)))
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return; // oops. we received a packet we just sent.
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continue; // oops. we received a packet we just sent.
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bool bssidmatch = MACEqual(&RXBuffer[12 + a_bss], (u8*)&IOPORT(W_BSSID0));
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bssidmatch = MACEqual(&RXBuffer[12 + a_bss], (u8*)&IOPORT(W_BSSID0));
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if (!(IOPORT(W_BSSID0) & 0x0001) && !(RXBuffer[12 + a_bss] & 0x01) &&
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!bssidmatch)
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{
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printf("received packet %04X but it didn't pass the BSSID check\n", framectl);
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return;
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continue;
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}
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break;
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}
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//if (framectl != 0x0080 && framectl != 0x0228)
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printf("wifi: received packet FC:%04X SN:%04X CL:%04X\n", framectl, *(u16*)&RXBuffer[12+4+6+6+6], *(u16*)&RXBuffer[12+4+6+6+6+2+2]);
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// make RX header
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// TODO: make it upon RX end
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if (bssidmatch) rxflags |= 0x8000;
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@ -679,7 +692,7 @@ void CheckRX(bool block)
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{
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printf("wifi: RX buffer full\n");
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// TODO: proper error management
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return;
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return false;
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}
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}
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@ -690,6 +703,7 @@ void CheckRX(bool block)
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RXEndAddr = (addr & ~0x3) >> 1;
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SetIRQ(6);
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return true;
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}
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@ -735,7 +749,7 @@ void USTimer(u32 param)
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if (!uspart) MSTimer();
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if (!(uspart & 0x1FF)) CheckRX(false);
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//if (!(uspart & 0x1FF)) CheckRX(false);
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}
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if (IOPORT(W_CmdCountCnt) & 0x0001)
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@ -749,17 +763,54 @@ void USTimer(u32 param)
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if (IOPORT(W_ContentFree) != 0)
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IOPORT(W_ContentFree)--;
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if (ComStatus == 0)
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{
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u16 txbusy = IOPORT(W_TXBusy);
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if (txbusy)
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{
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if (txbusy & 0x0080) ProcessTX(&TXSlots[5], 5);
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else if (txbusy & 0x0010) ProcessTX(&TXSlots[4], 4);
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else if (txbusy & 0x0008) ProcessTX(&TXSlots[3], 3);
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else if (txbusy & 0x0004) ProcessTX(&TXSlots[2], 2);
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else if (txbusy & 0x0002) ProcessTX(&TXSlots[1], 1);
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else if (txbusy & 0x0001) ProcessTX(&TXSlots[0], 0);
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ComStatus = 0x2;
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if (txbusy & 0x0080) TXCurSlot = 5;
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else if (txbusy & 0x0010) TXCurSlot = 4;
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else if (txbusy & 0x0008) TXCurSlot = 3;
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else if (txbusy & 0x0004) TXCurSlot = 2;
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else if (txbusy & 0x0002) TXCurSlot = 1;
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else if (txbusy & 0x0001) TXCurSlot = 0;
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}
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if (RXTime)
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else
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{
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if ((!(RXCounter & 0x1FF)))
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{
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if (CheckRX(false))
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ComStatus = 0x1;
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}
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RXCounter++;
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}
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}
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if (ComStatus & 0x2)
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{
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bool finished = ProcessTX(&TXSlots[TXCurSlot], TXCurSlot);
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if (finished)
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{
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// transfer finished, see if there's another slot to do
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// checkme: priority order of beacon/reply
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u16 txbusy = IOPORT(W_TXBusy);
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if (txbusy & 0x0080) TXCurSlot = 5;
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else if (txbusy & 0x0010) TXCurSlot = 4;
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else if (txbusy & 0x0008) TXCurSlot = 3;
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else if (txbusy & 0x0004) TXCurSlot = 2;
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else if (txbusy & 0x0002) TXCurSlot = 1;
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else if (txbusy & 0x0001) TXCurSlot = 0;
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else
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{
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TXCurSlot = -1;
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ComStatus = 0;
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RXCounter = 0;
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}
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}
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}
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if (ComStatus & 0x1)
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{
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// TODO: make sure it isn't possible to send and receive at the same time
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RXTime--;
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@ -768,6 +819,12 @@ void USTimer(u32 param)
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IOPORT(W_RXBufWriteCursor) = RXEndAddr;
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SetIRQ(0);
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if (TXCurSlot == -1)
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{
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ComStatus = 0;
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RXCounter = 0;
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}
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if ((RXBuffer[0] & 0x0F) == 0x0C)
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{
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u16 clientmask = *(u16*)&RXBuffer[0xC + 26];
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@ -914,6 +971,10 @@ u16 Read(u32 addr)
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}
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}
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break;
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case W_TXBusy:
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return IOPORT(W_TXBusy) & 0x001F; // no bit for MP replies. odd
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//case 0x214: NDS::debug(0); break;
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//case 0x040: NDS::debug(0); break;
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//case 0x54: printf("wifi: read WRCSR -> %04X\n", IOPORT(0x54)); break;
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@ -1198,6 +1259,11 @@ void Write(u32 addr, u16 val)
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addr, val, IOPORT(W_TXReqRead), (u32)(USCounter-mpreplywindow));
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break;
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case 0x228:
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case 0x244:
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printf("wifi: write port%03X %04X\n", addr, val);
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break;
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// read-only ports
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case 0x000:
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case 0x044:
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