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new block cache and much more...

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- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
 and loads/stores from constant addresses
This commit is contained in:
RSDuck
2019-10-03 01:10:59 +02:00
parent 0e26aa4ede
commit 40b88ab05a
18 changed files with 1536 additions and 695 deletions
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9
src/ARMInterpreter.h
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@ -28,6 +28,15 @@ namespace ARMInterpreter
extern void (*ARMInstrTable[4096])(ARM* cpu);
extern void (*THUMBInstrTable[1024])(ARM* cpu);
void A_MSR_IMM(ARM* cpu);
void A_MSR_REG(ARM* cpu);
void A_MRS(ARM* cpu);
void A_MCR(ARM* cpu);
void A_MRC(ARM* cpu);
void A_SVC(ARM* cpu);
void T_SVC(ARM* cpu);
void A_BLX_IMM(ARM* cpu); // I'm a special one look at me
}