jit: add compile option

This commit is contained in:
RSDuck
2019-07-14 19:24:00 +02:00
parent 360317be8c
commit 411fb57c07
13 changed files with 149 additions and 53 deletions

View File

@ -812,7 +812,9 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataCycles = 1;
*(u8*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -834,7 +836,9 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataCycles = 1;
*(u16*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -856,8 +860,10 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataCycles = 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -879,8 +885,10 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
{
DataCycles += 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2] = NULL;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2 + 1] = NULL;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr & 0x7FFF) >> 1) + 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))