From 42218106b04adb257ecc165d0e9b79a1065e65ed Mon Sep 17 00:00:00 2001 From: Jaklyy <102590697+Jaklyy@users.noreply.github.com> Date: Tue, 11 Jun 2024 10:09:40 -0400 Subject: [PATCH] verify writable msr bits --- src/ARMInterpreter.cpp | 12 ++++++------ src/ARMInterpreter_LoadStore.cpp | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/ARMInterpreter.cpp b/src/ARMInterpreter.cpp index d6c3a488..5a09d210 100644 --- a/src/ARMInterpreter.cpp +++ b/src/ARMInterpreter.cpp @@ -101,9 +101,9 @@ void A_MSR_IMM(ARM* cpu) u32 mask = 0; if (cpu->CurInstr & (1<<16)) mask |= 0x000000FF; - //if (cpu->CurInstr & (1<<17)) mask |= 0x0000FF00; - //if (cpu->CurInstr & (1<<18)) mask |= 0x00FF0000; - if (cpu->CurInstr & (1<<19)) mask |= (cpu->Num ? 0xF0000000 /* checkme */ : 0xF8000000); + //if (cpu->CurInstr & (1<<17)) mask |= 0x0000FF00; // unused by arm 7 & 9 + //if (cpu->CurInstr & (1<<18)) mask |= 0x00FF0000; // unused by arm 7 & 9 + if (cpu->CurInstr & (1<<19)) mask |= ((cpu->Num==1) ? 0xF0000000 : 0xF8000000); if (!(cpu->CurInstr & (1<<22))) mask &= 0xFFFFFFDF; @@ -154,9 +154,9 @@ void A_MSR_REG(ARM* cpu) u32 mask = 0; if (cpu->CurInstr & (1<<16)) mask |= 0x000000FF; - //if (cpu->CurInstr & (1<<17)) mask |= 0x0000FF00; - //if (cpu->CurInstr & (1<<18)) mask |= 0x00FF0000; - if (cpu->CurInstr & (1<<19)) mask |= (cpu->Num ? 0xF0000000 /* checkme */ : 0xF8000000); + //if (cpu->CurInstr & (1<<17)) mask |= 0x0000FF00; // unused by arm 7 & 9 + //if (cpu->CurInstr & (1<<18)) mask |= 0x00FF0000; // unused by arm 7 & 9 + if (cpu->CurInstr & (1<<19)) mask |= ((cpu->Num==1) ? 0xF0000000 : 0xF8000000); if (!(cpu->CurInstr & (1<<22))) mask &= 0xFFFFFFDF; diff --git a/src/ARMInterpreter_LoadStore.cpp b/src/ARMInterpreter_LoadStore.cpp index 7a33b8dd..4e705aed 100644 --- a/src/ARMInterpreter_LoadStore.cpp +++ b/src/ARMInterpreter_LoadStore.cpp @@ -411,7 +411,7 @@ void A_SWP(ARM* cpu) // rd only gets updated if both read and write succeed u32 rd = (cpu->CurInstr >> 12) & 0xF; if (rd != 15) cpu->R[rd] = ROR(val, 8*(base&0x3)); - else if (cpu->Num) cpu->JumpTo(ROR(val, 8*(base&0x3)) & ~1); // for some reason these jumps don't work on the arm 9? + else if (cpu->Num==1) cpu->JumpTo(ROR(val, 8*(base&0x3)) & ~1); // for some reason these jumps don't work on the arm 9? } cpu->DataCycles += numD; } @@ -433,7 +433,7 @@ void A_SWPB(ARM* cpu) // rd only gets updated if both read and write succeed u32 rd = (cpu->CurInstr >> 12) & 0xF; if (rd != 15) cpu->R[rd] = val; - else if (cpu->Num) cpu->JumpTo(val & ~1); // for some reason these jumps don't work on the arm 9? + else if (cpu->Num==1) cpu->JumpTo(val & ~1); // for some reason these jumps don't work on the arm 9? } cpu->DataCycles += numD; }