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Refactor the GPU to be object-oriented (#1873)

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* Refactor GPU3D to be an object

- Who has two thumbs and is the sworn enemy of global state? This guy!

* Refactor GPU itself to be an object

- Wow, it's used in a lot of places
- Also introduce a new `Melon` namespace for a few classes
- I expect other classes will be moved into `Melon` over time

* Change signature of Renderer3D::SetRenderSettings

- Make it noexcept, and its argument const

* Remove some stray whitespace
This commit is contained in:
Jesse Talavera-Greenberg
2023-11-09 15:54:51 -05:00
committed by GitHub
parent 88072a02c5
commit 4558be0d8e
25 changed files with 1513 additions and 1490 deletions
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329
src/NDS.cpp
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@ -185,6 +185,7 @@ class RTC* RTC;
class Wifi* Wifi;
std::unique_ptr<NDSCart::NDSCartSlot> NDSCartSlot;
std::unique_ptr<GBACart::GBACartSlot> GBACartSlot;
std::unique_ptr<Melon::GPU> GPU;
class AREngine* AREngine;
bool Running;
@ -204,8 +205,9 @@ bool Init()
RegisterEventFunc(Event_Div, 0, DivDone);
RegisterEventFunc(Event_Sqrt, 0, SqrtDone);
ARM9 = new ARMv5();
ARM7 = new ARMv4();
GPU = std::make_unique<Melon::GPU>();
ARM9 = new ARMv5(*GPU);
ARM7 = new ARMv4(*GPU);
#ifdef JIT_ENABLED
ARMJIT::Init();
@ -215,14 +217,14 @@ bool Init()
SharedWRAM = new u8[SharedWRAMSize];
#endif
DMAs[0] = new DMA(0, 0);
DMAs[1] = new DMA(0, 1);
DMAs[2] = new DMA(0, 2);
DMAs[3] = new DMA(0, 3);
DMAs[4] = new DMA(1, 0);
DMAs[5] = new DMA(1, 1);
DMAs[6] = new DMA(1, 2);
DMAs[7] = new DMA(1, 3);
DMAs[0] = new DMA(0, 0, *GPU);
DMAs[1] = new DMA(0, 1, *GPU);
DMAs[2] = new DMA(0, 2, *GPU);
DMAs[3] = new DMA(0, 3, *GPU);
DMAs[4] = new DMA(1, 0, *GPU);
DMAs[5] = new DMA(1, 1, *GPU);
DMAs[6] = new DMA(1, 2, *GPU);
DMAs[7] = new DMA(1, 3, *GPU);
SPU = new class SPU;
SPI = new class SPIHost();
@ -230,7 +232,6 @@ bool Init()
Wifi = new class Wifi();
NDSCartSlot = std::make_unique<NDSCart::NDSCartSlot>();
GBACartSlot = std::make_unique<GBACart::GBACartSlot>();
if (!GPU::Init()) return false;
if (!DSi::Init()) return false;
@ -261,7 +262,7 @@ void DeInit()
NDSCartSlot = nullptr;
GBACartSlot = nullptr;
GPU::DeInit();
GPU = nullptr;
DSi::DeInit();
@ -521,7 +522,7 @@ void SetupDirectBoot(const std::string& romname)
PostFlag7 = 0x01;
PowerControl9 = 0x820F;
GPU::SetPowerCnt(PowerControl9);
GPU->SetPowerCnt(PowerControl9);
// checkme
RCnt = 0x8000;
@ -644,9 +645,9 @@ void Reset()
KeyCnt[1] = 0;
RCnt = 0;
GPU->Reset();
NDSCartSlot->Reset();
GBACartSlot->Reset();
GPU::Reset();
SPU->Reset();
SPI->Reset();
RTC->Reset();
@ -720,7 +721,7 @@ void Stop(Platform::StopReason reason)
Log(level, "Stopping emulated console (Reason: %s)\n", StopReasonName(reason));
Running = false;
Platform::SignalStop(reason);
GPU::Stop();
GPU->Stop();
SPU->Stop();
if (ConsoleType == 1)
@ -848,7 +849,7 @@ bool DoSavestate(Savestate* file)
NDSCartSlot->DoSavestate(file);
if (ConsoleType == 0)
GBACartSlot->DoSavestate(file);
GPU::DoSavestate(file);
GPU->DoSavestate(file);
SPU->DoSavestate(file);
SPI->DoSavestate(file);
RTC->DoSavestate(file);
@ -859,7 +860,7 @@ bool DoSavestate(Savestate* file)
if (!file->Saving)
{
GPU::SetPowerCnt(PowerControl9);
GPU->SetPowerCnt(PowerControl9);
SPU->SetPowerCnt(PowerControl7 & 0x0001);
Wifi->SetPowerCnt(PowerControl7 & 0x0002);
@ -1071,7 +1072,7 @@ u32 RunFrame()
{
FrameStartTimestamp = SysTimestamp;
GPU::TotalScanlines = 0;
GPU->TotalScanlines = 0;
LagFrameFlag = true;
bool runFrame = Running && !(CPUStop & CPUStop_Sleep);
@ -1095,7 +1096,7 @@ u32 RunFrame()
ARM7Timestamp = target;
TimerTimestamp[0] = target;
TimerTimestamp[1] = target;
GPU3D::Timestamp = target;
GPU->GPU3D.Timestamp = target;
RunSystemSleep(target);
if (!(CPUStop & CPUStop_Sleep))
@ -1103,7 +1104,7 @@ u32 RunFrame()
}
if (SysTimestamp >= frametarget)
GPU::BlankFrame();
GPU->BlankFrame();
}
else
{
@ -1112,11 +1113,11 @@ u32 RunFrame()
if (!(CPUStop & CPUStop_Wakeup))
{
GPU::StartFrame();
GPU->StartFrame();
}
CPUStop &= ~CPUStop_Wakeup;
while (Running && GPU::TotalScanlines==0)
while (Running && GPU->TotalScanlines==0)
{
u64 target = NextTarget();
ARM9Target = target << ARM9ClockShift;
@ -1125,7 +1126,7 @@ u32 RunFrame()
if (CPUStop & CPUStop_GXStall)
{
// GXFIFO stall
s32 cycles = GPU3D::CyclesToRunFor();
s32 cycles = GPU->GPU3D.CyclesToRunFor();
ARM9Timestamp = std::min(ARM9Target, ARM9Timestamp+(cycles<<ARM9ClockShift));
}
@ -1148,7 +1149,7 @@ u32 RunFrame()
}
RunTimers(0);
GPU3D::Run();
GPU->GPU3D.Run();
target = ARM9Timestamp >> ARM9ClockShift;
CurCPU = 1;
@ -1187,7 +1188,7 @@ u32 RunFrame()
}
}
if (GPU::TotalScanlines == 0)
if (GPU->TotalScanlines == 0)
continue;
#ifdef DEBUG_CHECK_DESYNC
@ -1208,7 +1209,7 @@ u32 RunFrame()
NumLagFrames++;
if (Running)
return GPU::TotalScanlines;
return GPU->TotalScanlines;
else
return 263;
}
@ -1531,7 +1532,7 @@ void SetIRQ(u32 cpu, u32 irq)
{
CPUStop &= ~CPUStop_Sleep;
CPUStop |= CPUStop_Wakeup;
GPU3D::RestartFrame();
GPU->GPU3D.RestartFrame();
}
}
}
@ -1708,7 +1709,7 @@ void NocashPrint(u32 ncpu, u32 addr)
else if (!strcmp(cmd, "lr")) sprintf(subs, "%08X", cpu->R[14]);
else if (!strcmp(cmd, "pc")) sprintf(subs, "%08X", cpu->R[15]);
else if (!strcmp(cmd, "frame")) sprintf(subs, "%u", NumFrames);
else if (!strcmp(cmd, "scanline")) sprintf(subs, "%u", GPU::VCount);
else if (!strcmp(cmd, "scanline")) sprintf(subs, "%u", GPU->VCount);
else if (!strcmp(cmd, "totalclks")) sprintf(subs, "%" PRIu64, GetSysClockCycles(0));
else if (!strcmp(cmd, "lastclks")) sprintf(subs, "%" PRIu64, GetSysClockCycles(1));
else if (!strcmp(cmd, "zeroclks"))
@ -2081,7 +2082,7 @@ void debug(u32 param)
Log(LogLevel::Debug, "ARM7 IME=%08X IE=%08X IF=%08X IE2=%04X IF2=%04X\n", IME[1], IE[1], IF[1], IE2, IF2);
//for (int i = 0; i < 9; i++)
// printf("VRAM %c: %02X\n", 'A'+i, GPU::VRAMCNT[i]);
// printf("VRAM %c: %02X\n", 'A'+i, GPU->VRAMCNT[i]);
FILE*
shit = fopen("debug/DSfirmware.bin", "wb");
@ -2149,21 +2150,21 @@ u8 ARM9Read8(u32 addr)
case 0x05000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadPalette<u8>(addr);
return GPU->ReadPalette<u8>(addr);
case 0x06000000:
switch (addr & 0x00E00000)
{
case 0x00000000: return GPU::ReadVRAM_ABG<u8>(addr);
case 0x00200000: return GPU::ReadVRAM_BBG<u8>(addr);
case 0x00400000: return GPU::ReadVRAM_AOBJ<u8>(addr);
case 0x00600000: return GPU::ReadVRAM_BOBJ<u8>(addr);
default: return GPU::ReadVRAM_LCDC<u8>(addr);
case 0x00000000: return GPU->ReadVRAM_ABG<u8>(addr);
case 0x00200000: return GPU->ReadVRAM_BBG<u8>(addr);
case 0x00400000: return GPU->ReadVRAM_AOBJ<u8>(addr);
case 0x00600000: return GPU->ReadVRAM_BOBJ<u8>(addr);
default: return GPU->ReadVRAM_LCDC<u8>(addr);
}
case 0x07000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadOAM<u8>(addr);
return GPU->ReadOAM<u8>(addr);
case 0x08000000:
case 0x09000000:
@ -2211,21 +2212,21 @@ u16 ARM9Read16(u32 addr)
case 0x05000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadPalette<u16>(addr);
return GPU->ReadPalette<u16>(addr);
case 0x06000000:
switch (addr & 0x00E00000)
{
case 0x00000000: return GPU::ReadVRAM_ABG<u16>(addr);
case 0x00200000: return GPU::ReadVRAM_BBG<u16>(addr);
case 0x00400000: return GPU::ReadVRAM_AOBJ<u16>(addr);
case 0x00600000: return GPU::ReadVRAM_BOBJ<u16>(addr);
default: return GPU::ReadVRAM_LCDC<u16>(addr);
case 0x00000000: return GPU->ReadVRAM_ABG<u16>(addr);
case 0x00200000: return GPU->ReadVRAM_BBG<u16>(addr);
case 0x00400000: return GPU->ReadVRAM_AOBJ<u16>(addr);
case 0x00600000: return GPU->ReadVRAM_BOBJ<u16>(addr);
default: return GPU->ReadVRAM_LCDC<u16>(addr);
}
case 0x07000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadOAM<u16>(addr);
return GPU->ReadOAM<u16>(addr);
case 0x08000000:
case 0x09000000:
@ -2273,21 +2274,21 @@ u32 ARM9Read32(u32 addr)
case 0x05000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadPalette<u32>(addr);
return GPU->ReadPalette<u32>(addr);
case 0x06000000:
switch (addr & 0x00E00000)
{
case 0x00000000: return GPU::ReadVRAM_ABG<u32>(addr);
case 0x00200000: return GPU::ReadVRAM_BBG<u32>(addr);
case 0x00400000: return GPU::ReadVRAM_AOBJ<u32>(addr);
case 0x00600000: return GPU::ReadVRAM_BOBJ<u32>(addr);
default: return GPU::ReadVRAM_LCDC<u32>(addr);
case 0x00000000: return GPU->ReadVRAM_ABG<u32>(addr);
case 0x00200000: return GPU->ReadVRAM_BBG<u32>(addr);
case 0x00400000: return GPU->ReadVRAM_AOBJ<u32>(addr);
case 0x00600000: return GPU->ReadVRAM_BOBJ<u32>(addr);
default: return GPU->ReadVRAM_LCDC<u32>(addr);
}
case 0x07000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return 0;
return GPU::ReadOAM<u32>(addr & 0x7FF);
return GPU->ReadOAM<u32>(addr & 0x7FF);
case 0x08000000:
case 0x09000000:
@ -2382,7 +2383,7 @@ void ARM9Write16(u32 addr, u16 val)
case 0x05000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return;
GPU::WritePalette<u16>(addr, val);
GPU->WritePalette<u16>(addr, val);
return;
case 0x06000000:
@ -2391,16 +2392,16 @@ void ARM9Write16(u32 addr, u16 val)
#endif
switch (addr & 0x00E00000)
{
case 0x00000000: GPU::WriteVRAM_ABG<u16>(addr, val); return;
case 0x00200000: GPU::WriteVRAM_BBG<u16>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u16>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u16>(addr, val); return;
default: GPU::WriteVRAM_LCDC<u16>(addr, val); return;
case 0x00000000: GPU->WriteVRAM_ABG<u16>(addr, val); return;
case 0x00200000: GPU->WriteVRAM_BBG<u16>(addr, val); return;
case 0x00400000: GPU->WriteVRAM_AOBJ<u16>(addr, val); return;
case 0x00600000: GPU->WriteVRAM_BOBJ<u16>(addr, val); return;
default: GPU->WriteVRAM_LCDC<u16>(addr, val); return;
}
case 0x07000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return;
GPU::WriteOAM<u16>(addr, val);
GPU->WriteOAM<u16>(addr, val);
return;
case 0x08000000:
@ -2450,7 +2451,7 @@ void ARM9Write32(u32 addr, u32 val)
case 0x05000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return;
GPU::WritePalette(addr, val);
GPU->WritePalette(addr, val);
return;
case 0x06000000:
@ -2459,16 +2460,16 @@ void ARM9Write32(u32 addr, u32 val)
#endif
switch (addr & 0x00E00000)
{
case 0x00000000: GPU::WriteVRAM_ABG<u32>(addr, val); return;
case 0x00200000: GPU::WriteVRAM_BBG<u32>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u32>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u32>(addr, val); return;
default: GPU::WriteVRAM_LCDC<u32>(addr, val); return;
case 0x00000000: GPU->WriteVRAM_ABG<u32>(addr, val); return;
case 0x00200000: GPU->WriteVRAM_BBG<u32>(addr, val); return;
case 0x00400000: GPU->WriteVRAM_AOBJ<u32>(addr, val); return;
case 0x00600000: GPU->WriteVRAM_BOBJ<u32>(addr, val); return;
default: GPU->WriteVRAM_LCDC<u32>(addr, val); return;
}
case 0x07000000:
if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return;
GPU::WriteOAM<u32>(addr, val);
GPU->WriteOAM<u32>(addr, val);
return;
case 0x08000000:
@ -2570,7 +2571,7 @@ u8 ARM7Read8(u32 addr)
case 0x06000000:
case 0x06800000:
return GPU::ReadVRAM_ARM7<u8>(addr);
return GPU->ReadVRAM_ARM7<u8>(addr);
case 0x08000000:
case 0x08800000:
@ -2638,7 +2639,7 @@ u16 ARM7Read16(u32 addr)
case 0x06000000:
case 0x06800000:
return GPU::ReadVRAM_ARM7<u16>(addr);
return GPU->ReadVRAM_ARM7<u16>(addr);
case 0x08000000:
case 0x08800000:
@ -2706,7 +2707,7 @@ u32 ARM7Read32(u32 addr)
case 0x06000000:
case 0x06800000:
return GPU::ReadVRAM_ARM7<u32>(addr);
return GPU->ReadVRAM_ARM7<u32>(addr);
case 0x08000000:
case 0x08800000:
@ -2777,7 +2778,7 @@ void ARM7Write8(u32 addr, u8 val)
#ifdef JIT_ENABLED
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
#endif
GPU::WriteVRAM_ARM7<u8>(addr, val);
GPU->WriteVRAM_ARM7<u8>(addr, val);
return;
case 0x08000000:
@ -2856,7 +2857,7 @@ void ARM7Write16(u32 addr, u16 val)
#ifdef JIT_ENABLED
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
#endif
GPU::WriteVRAM_ARM7<u16>(addr, val);
GPU->WriteVRAM_ARM7<u16>(addr, val);
return;
case 0x08000000:
@ -2938,7 +2939,7 @@ void ARM7Write32(u32 addr, u32 val)
#ifdef JIT_ENABLED
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
#endif
GPU::WriteVRAM_ARM7<u32>(addr, val);
GPU->WriteVRAM_ARM7<u32>(addr, val);
return;
case 0x08000000:
@ -3073,16 +3074,16 @@ u8 ARM9IORead8(u32 addr)
case 0x04000208: return IME[0];
case 0x04000240: return GPU::VRAMCNT[0];
case 0x04000241: return GPU::VRAMCNT[1];
case 0x04000242: return GPU::VRAMCNT[2];
case 0x04000243: return GPU::VRAMCNT[3];
case 0x04000244: return GPU::VRAMCNT[4];
case 0x04000245: return GPU::VRAMCNT[5];
case 0x04000246: return GPU::VRAMCNT[6];
case 0x04000240: return GPU->VRAMCNT[0];
case 0x04000241: return GPU->VRAMCNT[1];
case 0x04000242: return GPU->VRAMCNT[2];
case 0x04000243: return GPU->VRAMCNT[3];
case 0x04000244: return GPU->VRAMCNT[4];
case 0x04000245: return GPU->VRAMCNT[5];
case 0x04000246: return GPU->VRAMCNT[6];
case 0x04000247: return WRAMCnt;
case 0x04000248: return GPU::VRAMCNT[7];
case 0x04000249: return GPU::VRAMCNT[8];
case 0x04000248: return GPU->VRAMCNT[7];
case 0x04000249: return GPU->VRAMCNT[8];
CASE_READ8_16BIT(0x04000280, DivCnt)
CASE_READ8_32BIT(0x04000290, DivNumerator[0])
@ -3104,15 +3105,15 @@ u8 ARM9IORead8(u32 addr)
if (addr >= 0x04000000 && addr < 0x04000060)
{
return GPU::GPU2D_A.Read8(addr);
return GPU->GPU2D_A.Read8(addr);
}
if (addr >= 0x04001000 && addr < 0x04001060)
{
return GPU::GPU2D_B.Read8(addr);
return GPU->GPU2D_B.Read8(addr);
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
return GPU3D::Read8(addr);
return GPU->GPU3D.Read8(addr);
}
// NO$GBA debug register "Emulation ID"
if(addr >= 0x04FFFA00 && addr < 0x04FFFA10)
@ -3132,12 +3133,12 @@ u16 ARM9IORead16(u32 addr)
{
switch (addr)
{
case 0x04000004: return GPU::DispStat[0];
case 0x04000006: return GPU::VCount;
case 0x04000004: return GPU->DispStat[0];
case 0x04000006: return GPU->VCount;
case 0x04000060: return GPU3D::Read16(addr);
case 0x04000060: return GPU->GPU3D.Read16(addr);
case 0x04000064:
case 0x04000066: return GPU::GPU2D_A.Read16(addr);
case 0x04000066: return GPU->GPU2D_A.Read16(addr);
case 0x040000B8: return DMAs[0]->Cnt & 0xFFFF;
case 0x040000BA: return DMAs[0]->Cnt >> 16;
@ -3215,11 +3216,11 @@ u16 ARM9IORead16(u32 addr)
case 0x04000210: return IE[0] & 0xFFFF;
case 0x04000212: return IE[0] >> 16;
case 0x04000240: return GPU::VRAMCNT[0] | (GPU::VRAMCNT[1] << 8);
case 0x04000242: return GPU::VRAMCNT[2] | (GPU::VRAMCNT[3] << 8);
case 0x04000244: return GPU::VRAMCNT[4] | (GPU::VRAMCNT[5] << 8);
case 0x04000246: return GPU::VRAMCNT[6] | (WRAMCnt << 8);
case 0x04000248: return GPU::VRAMCNT[7] | (GPU::VRAMCNT[8] << 8);
case 0x04000240: return GPU->VRAMCNT[0] | (GPU->VRAMCNT[1] << 8);
case 0x04000242: return GPU->VRAMCNT[2] | (GPU->VRAMCNT[3] << 8);
case 0x04000244: return GPU->VRAMCNT[4] | (GPU->VRAMCNT[5] << 8);
case 0x04000246: return GPU->VRAMCNT[6] | (WRAMCnt << 8);
case 0x04000248: return GPU->VRAMCNT[7] | (GPU->VRAMCNT[8] << 8);
case 0x04000280: return DivCnt;
case 0x04000290: return DivNumerator[0] & 0xFFFF;
@ -3259,15 +3260,15 @@ u16 ARM9IORead16(u32 addr)
if ((addr >= 0x04000000 && addr < 0x04000060) || (addr == 0x0400006C))
{
return GPU::GPU2D_A.Read16(addr);
return GPU->GPU2D_A.Read16(addr);
}
if ((addr >= 0x04001000 && addr < 0x04001060) || (addr == 0x0400106C))
{
return GPU::GPU2D_B.Read16(addr);
return GPU->GPU2D_B.Read16(addr);
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
return GPU3D::Read16(addr);
return GPU->GPU3D.Read16(addr);
}
if ((addr & 0xFFFFF000) != 0x04004000)
@ -3279,10 +3280,10 @@ u32 ARM9IORead32(u32 addr)
{
switch (addr)
{
case 0x04000004: return GPU::DispStat[0] | (GPU::VCount << 16);
case 0x04000004: return GPU->DispStat[0] | (GPU->VCount << 16);
case 0x04000060: return GPU3D::Read32(addr);
case 0x04000064: return GPU::GPU2D_A.Read32(addr);
case 0x04000060: return GPU->GPU3D.Read32(addr);
case 0x04000064: return GPU->GPU2D_A.Read32(addr);
case 0x040000B0: return DMAs[0]->SrcAddr;
case 0x040000B4: return DMAs[0]->DstAddr;
@ -3342,9 +3343,9 @@ u32 ARM9IORead32(u32 addr)
case 0x04000210: return IE[0];
case 0x04000214: return IF[0];
case 0x04000240: return GPU::VRAMCNT[0] | (GPU::VRAMCNT[1] << 8) | (GPU::VRAMCNT[2] << 16) | (GPU::VRAMCNT[3] << 24);
case 0x04000244: return GPU::VRAMCNT[4] | (GPU::VRAMCNT[5] << 8) | (GPU::VRAMCNT[6] << 16) | (WRAMCnt << 24);
case 0x04000248: return GPU::VRAMCNT[7] | (GPU::VRAMCNT[8] << 8);
case 0x04000240: return GPU->VRAMCNT[0] | (GPU->VRAMCNT[1] << 8) | (GPU->VRAMCNT[2] << 16) | (GPU->VRAMCNT[3] << 24);
case 0x04000244: return GPU->VRAMCNT[4] | (GPU->VRAMCNT[5] << 8) | (GPU->VRAMCNT[6] << 16) | (WRAMCnt << 24);
case 0x04000248: return GPU->VRAMCNT[7] | (GPU->VRAMCNT[8] << 8);
case 0x04000280: return DivCnt;
case 0x04000290: return DivNumerator[0];
@ -3403,15 +3404,15 @@ u32 ARM9IORead32(u32 addr)
if ((addr >= 0x04000000 && addr < 0x04000060) || (addr == 0x0400006C))
{
return GPU::GPU2D_A.Read32(addr);
return GPU->GPU2D_A.Read32(addr);
}
if ((addr >= 0x04001000 && addr < 0x04001060) || (addr == 0x0400106C))
{
return GPU::GPU2D_B.Read32(addr);
return GPU->GPU2D_B.Read32(addr);
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
return GPU3D::Read32(addr);
return GPU->GPU3D.Read32(addr);
}
if ((addr & 0xFFFFF000) != 0x04004000)
@ -3424,9 +3425,9 @@ void ARM9IOWrite8(u32 addr, u8 val)
switch (addr)
{
case 0x0400006C:
case 0x0400006D: GPU::GPU2D_A.Write8(addr, val); return;
case 0x0400006D: GPU->GPU2D_A.Write8(addr, val); return;
case 0x0400106C:
case 0x0400106D: GPU::GPU2D_B.Write8(addr, val); return;
case 0x0400106D: GPU->GPU2D_B.Write8(addr, val); return;
case 0x04000132:
KeyCnt[0] = (KeyCnt[0] & 0xFF00) | val;
@ -3463,16 +3464,16 @@ void ARM9IOWrite8(u32 addr, u8 val)
case 0x04000208: IME[0] = val & 0x1; UpdateIRQ(0); return;
case 0x04000240: GPU::MapVRAM_AB(0, val); return;
case 0x04000241: GPU::MapVRAM_AB(1, val); return;
case 0x04000242: GPU::MapVRAM_CD(2, val); return;
case 0x04000243: GPU::MapVRAM_CD(3, val); return;
case 0x04000244: GPU::MapVRAM_E(4, val); return;
case 0x04000245: GPU::MapVRAM_FG(5, val); return;
case 0x04000246: GPU::MapVRAM_FG(6, val); return;
case 0x04000240: GPU->MapVRAM_AB(0, val); return;
case 0x04000241: GPU->MapVRAM_AB(1, val); return;
case 0x04000242: GPU->MapVRAM_CD(2, val); return;
case 0x04000243: GPU->MapVRAM_CD(3, val); return;
case 0x04000244: GPU->MapVRAM_E(4, val); return;
case 0x04000245: GPU->MapVRAM_FG(5, val); return;
case 0x04000246: GPU->MapVRAM_FG(6, val); return;
case 0x04000247: MapSharedWRAM(val); return;
case 0x04000248: GPU::MapVRAM_H(7, val); return;
case 0x04000249: GPU::MapVRAM_I(8, val); return;
case 0x04000248: GPU->MapVRAM_H(7, val); return;
case 0x04000249: GPU->MapVRAM_I(8, val); return;
case 0x04000300:
if (PostFlag9 & 0x01) val |= 0x01;
@ -3482,17 +3483,17 @@ void ARM9IOWrite8(u32 addr, u8 val)
if (addr >= 0x04000000 && addr < 0x04000060)
{
GPU::GPU2D_A.Write8(addr, val);
GPU->GPU2D_A.Write8(addr, val);
return;
}
if (addr >= 0x04001000 && addr < 0x04001060)
{
GPU::GPU2D_B.Write8(addr, val);
GPU->GPU2D_B.Write8(addr, val);
return;
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
GPU3D::Write8(addr, val);
GPU->GPU3D.Write8(addr, val);
return;
}
@ -3503,16 +3504,16 @@ void ARM9IOWrite16(u32 addr, u16 val)
{
switch (addr)
{
case 0x04000004: GPU::SetDispStat(0, val); return;
case 0x04000006: GPU::SetVCount(val); return;
case 0x04000004: GPU->SetDispStat(0, val); return;
case 0x04000006: GPU->SetVCount(val); return;
case 0x04000060: GPU3D::Write16(addr, val); return;
case 0x04000060: GPU->GPU3D.Write16(addr, val); return;
case 0x04000068:
case 0x0400006A: GPU::GPU2D_A.Write16(addr, val); return;
case 0x0400006A: GPU->GPU2D_A.Write16(addr, val); return;
case 0x0400006C: GPU::GPU2D_A.Write16(addr, val); return;
case 0x0400106C: GPU::GPU2D_B.Write16(addr, val); return;
case 0x0400006C: GPU->GPU2D_A.Write16(addr, val); return;
case 0x0400106C: GPU->GPU2D_B.Write16(addr, val); return;
case 0x040000B8: DMAs[0]->WriteCnt((DMAs[0]->Cnt & 0xFFFF0000) | val); return;
case 0x040000BA: DMAs[0]->WriteCnt((DMAs[0]->Cnt & 0x0000FFFF) | (val << 16)); return;
@ -3629,24 +3630,24 @@ void ARM9IOWrite16(u32 addr, u16 val)
// TODO: what happens when writing to IF this way??
case 0x04000240:
GPU::MapVRAM_AB(0, val & 0xFF);
GPU::MapVRAM_AB(1, val >> 8);
GPU->MapVRAM_AB(0, val & 0xFF);
GPU->MapVRAM_AB(1, val >> 8);
return;
case 0x04000242:
GPU::MapVRAM_CD(2, val & 0xFF);
GPU::MapVRAM_CD(3, val >> 8);
GPU->MapVRAM_CD(2, val & 0xFF);
GPU->MapVRAM_CD(3, val >> 8);
return;
case 0x04000244:
GPU::MapVRAM_E(4, val & 0xFF);
GPU::MapVRAM_FG(5, val >> 8);
GPU->MapVRAM_E(4, val & 0xFF);
GPU->MapVRAM_FG(5, val >> 8);
return;
case 0x04000246:
GPU::MapVRAM_FG(6, val & 0xFF);
GPU->MapVRAM_FG(6, val & 0xFF);
MapSharedWRAM(val >> 8);
return;
case 0x04000248:
GPU::MapVRAM_H(7, val & 0xFF);
GPU::MapVRAM_I(8, val >> 8);
GPU->MapVRAM_H(7, val & 0xFF);
GPU->MapVRAM_I(8, val >> 8);
return;
case 0x04000280: DivCnt = val; StartDiv(); return;
@ -3660,23 +3661,23 @@ void ARM9IOWrite16(u32 addr, u16 val)
case 0x04000304:
PowerControl9 = val & 0x820F;
GPU::SetPowerCnt(PowerControl9);
GPU->SetPowerCnt(PowerControl9);
return;
}
if (addr >= 0x04000000 && addr < 0x04000060)
{
GPU::GPU2D_A.Write16(addr, val);
GPU->GPU2D_A.Write16(addr, val);
return;
}
if (addr >= 0x04001000 && addr < 0x04001060)
{
GPU::GPU2D_B.Write16(addr, val);
GPU->GPU2D_B.Write16(addr, val);
return;
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
GPU3D::Write16(addr, val);
GPU->GPU3D.Write16(addr, val);
return;
}
@ -3688,16 +3689,16 @@ void ARM9IOWrite32(u32 addr, u32 val)
switch (addr)
{
case 0x04000004:
GPU::SetDispStat(0, val & 0xFFFF);
GPU::SetVCount(val >> 16);
GPU->SetDispStat(0, val & 0xFFFF);
GPU->SetVCount(val >> 16);
return;
case 0x04000060: GPU3D::Write32(addr, val); return;
case 0x04000060: GPU->GPU3D.Write32(addr, val); return;
case 0x04000064:
case 0x04000068: GPU::GPU2D_A.Write32(addr, val); return;
case 0x04000068: GPU->GPU2D_A.Write32(addr, val); return;
case 0x0400006C: GPU::GPU2D_A.Write16(addr, val&0xFFFF); return;
case 0x0400106C: GPU::GPU2D_B.Write16(addr, val&0xFFFF); return;
case 0x0400006C: GPU->GPU2D_A.Write16(addr, val&0xFFFF); return;
case 0x0400106C: GPU->GPU2D_B.Write16(addr, val&0xFFFF); return;
case 0x040000B0: DMAs[0]->SrcAddr = val; return;
case 0x040000B4: DMAs[0]->DstAddr = val; return;
@ -3793,23 +3794,23 @@ void ARM9IOWrite32(u32 addr, u32 val)
case 0x04000208: IME[0] = val & 0x1; UpdateIRQ(0); return;
case 0x04000210: IE[0] = val; UpdateIRQ(0); return;
case 0x04000214: IF[0] &= ~val; GPU3D::CheckFIFOIRQ(); UpdateIRQ(0); return;
case 0x04000214: IF[0] &= ~val; GPU->GPU3D.CheckFIFOIRQ(); UpdateIRQ(0); return;
case 0x04000240:
GPU::MapVRAM_AB(0, val & 0xFF);
GPU::MapVRAM_AB(1, (val >> 8) & 0xFF);
GPU::MapVRAM_CD(2, (val >> 16) & 0xFF);
GPU::MapVRAM_CD(3, val >> 24);
GPU->MapVRAM_AB(0, val & 0xFF);
GPU->MapVRAM_AB(1, (val >> 8) & 0xFF);
GPU->MapVRAM_CD(2, (val >> 16) & 0xFF);
GPU->MapVRAM_CD(3, val >> 24);
return;
case 0x04000244:
GPU::MapVRAM_E(4, val & 0xFF);
GPU::MapVRAM_FG(5, (val >> 8) & 0xFF);
GPU::MapVRAM_FG(6, (val >> 16) & 0xFF);
GPU->MapVRAM_E(4, val & 0xFF);
GPU->MapVRAM_FG(5, (val >> 8) & 0xFF);
GPU->MapVRAM_FG(6, (val >> 16) & 0xFF);
MapSharedWRAM(val >> 24);
return;
case 0x04000248:
GPU::MapVRAM_H(7, val & 0xFF);
GPU::MapVRAM_I(8, (val >> 8) & 0xFF);
GPU->MapVRAM_H(7, val & 0xFF);
GPU->MapVRAM_I(8, (val >> 8) & 0xFF);
return;
case 0x04000280: DivCnt = val; StartDiv(); return;
@ -3826,7 +3827,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
case 0x04000304:
PowerControl9 = val & 0x820F;
GPU::SetPowerCnt(PowerControl9);
GPU->SetPowerCnt(PowerControl9);
return;
case 0x04100010:
@ -3864,17 +3865,17 @@ void ARM9IOWrite32(u32 addr, u32 val)
if (addr >= 0x04000000 && addr < 0x04000060)
{
GPU::GPU2D_A.Write32(addr, val);
GPU->GPU2D_A.Write32(addr, val);
return;
}
if (addr >= 0x04001000 && addr < 0x04001060)
{
GPU::GPU2D_B.Write32(addr, val);
GPU->GPU2D_B.Write32(addr, val);
return;
}
if (addr >= 0x04000320 && addr < 0x040006A4)
{
GPU3D::Write32(addr, val);
GPU->GPU3D.Write32(addr, val);
return;
}
@ -3939,7 +3940,7 @@ u8 ARM7IORead8(u32 addr)
case 0x04000208: return IME[1];
case 0x04000240: return GPU::VRAMSTAT;
case 0x04000240: return GPU->VRAMSTAT;
case 0x04000241: return WRAMCnt;
case 0x04000300: return PostFlag7;
@ -3960,8 +3961,8 @@ u16 ARM7IORead16(u32 addr)
{
switch (addr)
{
case 0x04000004: return GPU::DispStat[1];
case 0x04000006: return GPU::VCount;
case 0x04000004: return GPU->DispStat[1];
case 0x04000006: return GPU->VCount;
case 0x040000B8: return DMAs[4]->Cnt & 0xFFFF;
case 0x040000BA: return DMAs[4]->Cnt >> 16;
@ -4054,7 +4055,7 @@ u32 ARM7IORead32(u32 addr)
{
switch (addr)
{
case 0x04000004: return GPU::DispStat[1] | (GPU::VCount << 16);
case 0x04000004: return GPU->DispStat[1] | (GPU->VCount << 16);
case 0x040000B0: return DMAs[4]->SrcAddr;
case 0x040000B4: return DMAs[4]->DstAddr;
@ -4232,8 +4233,8 @@ void ARM7IOWrite16(u32 addr, u16 val)
{
switch (addr)
{
case 0x04000004: GPU::SetDispStat(1, val); return;
case 0x04000006: GPU::SetVCount(val); return;
case 0x04000004: GPU->SetDispStat(1, val); return;
case 0x04000006: GPU->SetVCount(val); return;
case 0x040000B8: DMAs[4]->WriteCnt((DMAs[4]->Cnt & 0xFFFF0000) | val); return;
case 0x040000BA: DMAs[4]->WriteCnt((DMAs[4]->Cnt & 0x0000FFFF) | (val << 16)); return;
@ -4388,8 +4389,8 @@ void ARM7IOWrite32(u32 addr, u32 val)
switch (addr)
{
case 0x04000004:
GPU::SetDispStat(1, val & 0xFFFF);
GPU::SetVCount(val >> 16);
GPU->SetDispStat(1, val & 0xFFFF);
GPU->SetVCount(val >> 16);
return;
case 0x040000B0: DMAs[4]->SrcAddr = val; return;