prevent t bit changes without pipeline flush on arm7

idk what's happening fully and its gonna be slow to emulate most likely
we'll figure this out later
This commit is contained in:
Jaklyy
2024-09-19 20:57:55 -04:00
parent 6ebabde392
commit 45f87a1c8d
4 changed files with 80 additions and 47 deletions

View File

@ -201,13 +201,6 @@ void ARMv5::Reset()
ARM::Reset();
}
void ARMv4::Reset()
{
Thumb = false;
ARM::Reset();
}
void ARM::DoSavestate(Savestate* file)
{
@ -402,7 +395,6 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
Cycles += NDS.ARM7MemTimings[CodeCycles][0] + NDS.ARM7MemTimings[CodeCycles][1];
CPSR |= 0x20;
Thumb = true;
}
else
{
@ -416,7 +408,6 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
Cycles += NDS.ARM7MemTimings[CodeCycles][2] + NDS.ARM7MemTimings[CodeCycles][3];
CPSR &= ~0x20;
Thumb = false;
}
}
@ -840,11 +831,8 @@ void ARMv4::Execute()
else
#endif
{
if (Thumb) // THUMB
if (CPSR & 0x20) // THUMB
{
Thumb = (CPSR & 0x20);
bool fix = !Thumb;
if constexpr (mode == CPUExecuteMode::InterpreterGDB)
GdbCheckC();
@ -858,22 +846,12 @@ void ARMv4::Execute()
else
{
// actually execute
u32 icode = (CurInstr >> 6) & 0x3FF;
u32 icode = (CurInstr >> 6);
ARMInterpreter::THUMBInstrTable[icode](this);
}
if (fix) [[unlikely]]
{
// probably wrong?
// fixup
R[15] &= ~0x3;
NextInstr[1] = CodeRead32(R[15]);
}
}
else
{
Thumb = (CPSR & 0x20);
if constexpr (mode == CPUExecuteMode::InterpreterGDB)
GdbCheckC();