mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-06-28 01:49:42 -06:00
actually make DSi-mode direct boot work to some extent
This commit is contained in:
Arisotura
322
src/DSi.cpp
322
src/DSi.cpp
@ -25,6 +25,7 @@
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#include "ARM.h"
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#include "GPU.h"
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#include "NDSCart.h"
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#include "SPI.h"
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#include "Platform.h"
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#ifdef JIT_ENABLED
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@ -187,37 +188,310 @@ void Reset()
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ARM7Write16(eaddr+0x42, 0x0001);
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}
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void DecryptModcryptArea(u32 offset, u32 size, u8* iv)
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{
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AES_ctx ctx;
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u8 key[16];
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u8 tmp[16];
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if ((offset == 0) || (size == 0))
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return;
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if ((NDSCart::Header.DSiCryptoFlags & (1<<4)) ||
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(NDSCart::Header.AppFlags & (1<<7)))
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{
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// dev key
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memcpy(key, &NDSCart::CartROM[0], 16);
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}
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else
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{
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u8 keyX[16], keyY[16];
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*(u32*)&keyX[0] = 0x746E694E;
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*(u32*)&keyX[4] = 0x6F646E65;
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keyX[8] = NDSCart::Header.GameCode[0];
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keyX[9] = NDSCart::Header.GameCode[1];
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keyX[10] = NDSCart::Header.GameCode[2];
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keyX[11] = NDSCart::Header.GameCode[3];
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keyX[12] = NDSCart::Header.GameCode[3];
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keyX[13] = NDSCart::Header.GameCode[2];
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keyX[14] = NDSCart::Header.GameCode[1];
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keyX[15] = NDSCart::Header.GameCode[0];
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memcpy(keyY, NDSCart::Header.DSiARM9iHash, 16);
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DSi_AES::DeriveNormalKey(keyX, keyY, tmp);
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}
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DSi_AES::Swap16(key, tmp);
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DSi_AES::Swap16(tmp, iv);
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AES_init_ctx_iv(&ctx, key, tmp);
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// find a matching binary area
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u32 binaryaddr, binarysize;
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// CHECKME: GBAtek says the modcrypt area should be the same size, or bigger,
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// than the binary area being considered
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// but I have seen modcrypt areas smaller than the ARM9i binary
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#define BINARY_GOOD(name) \
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((offset >= NDSCart::Header.name##ROMOffset) && \
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(offset+size) <= (NDSCart::Header.name##ROMOffset+NDSCart::Header.name##Size))
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if (BINARY_GOOD(ARM9))
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{
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binaryaddr = NDSCart::Header.ARM9RAMAddress;
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binarysize = NDSCart::Header.ARM9Size;
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}
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else if (BINARY_GOOD(ARM7))
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{
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binaryaddr = NDSCart::Header.ARM7RAMAddress;
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binarysize = NDSCart::Header.ARM7Size;
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}
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else if (BINARY_GOOD(DSiARM9i))
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{
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binaryaddr = NDSCart::Header.DSiARM9iRAMAddress;
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binarysize = NDSCart::Header.DSiARM9iSize;
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}
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else if (BINARY_GOOD(DSiARM7i))
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{
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binaryaddr = NDSCart::Header.DSiARM7iRAMAddress;
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binarysize = NDSCart::Header.DSiARM7iSize;
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}
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else
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return;
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#undef BINARY_GOOD
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for (u32 i = 0; i < size; i+=16)
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{
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u8 data[16];
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*(u32*)&data[0] = ARM9Read32(binaryaddr+i);
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*(u32*)&data[4] = ARM9Read32(binaryaddr+i+4);
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*(u32*)&data[8] = ARM9Read32(binaryaddr+i+8);
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*(u32*)&data[12] = ARM9Read32(binaryaddr+i+12);
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DSi_AES::Swap16(tmp, data);
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AES_CTR_xcrypt_buffer(&ctx, tmp, 16);
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DSi_AES::Swap16(data, tmp);
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ARM9Write32(binaryaddr+i, *(u32*)&data[0]);
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ARM9Write32(binaryaddr+i+4, *(u32*)&data[4]);
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ARM9Write32(binaryaddr+i+8, *(u32*)&data[8]);
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ARM9Write32(binaryaddr+i+12, *(u32*)&data[12]);
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}
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}
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void SetupDirectBoot()
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{
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// If loading a NDS directly, this value should be set
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// depending on the console type in the header at offset 12h
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switch (NDSCart::Header.UnitCode)
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bool dsmode = false;
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// TODO: add controls for forcing DS or DSi mode?
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if (!(NDSCart::Header.UnitCode & 0x02))
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dsmode = true;
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// TODO: RAM size!!
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if (dsmode)
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{
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case 0x00: /* NDS Image */
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// on a pure NDS Image, we disable all extended features
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// TODO: For now keep the features enabled, as you can run pure NDS in NDS Emulation anyway
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SCFG_BIOS = 0x0303;
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break;
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case 0x02: /* DSi Enhanced Image */
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SCFG_BIOS = 0x0303;
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break;
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default:
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SCFG_BIOS = 0x0101; // TODO: should be zero when booting from BIOS
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break;
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// no NWRAM Mapping
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for (int i = 0; i < 4; i++)
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MapNWRAM_A(i, 0);
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for (int i = 0; i < 8; i++)
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MapNWRAM_B(i, 0);
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for (int i = 0; i < 8; i++)
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MapNWRAM_C(i, 0);
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// No NWRAM Window
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for (int i = 0; i < 3; i++)
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{
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MapNWRAMRange(0, i, 0);
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MapNWRAMRange(1, i, 0);
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}
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NDS::MapSharedWRAM(3);
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// TODO: clock speed!
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}
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// no NWRAM Mapping
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for (int i = 0; i < 4; i++)
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MapNWRAM_A(i, 0);
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for (int i = 0; i < 8; i++)
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MapNWRAM_B(i, 0);
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for (int i = 0; i < 8; i++)
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MapNWRAM_C(i, 0);
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// No NWRAM Window
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for (int i = 0; i < 3; i++)
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else
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{
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MapNWRAMRange(0, i, 0);
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MapNWRAMRange(1, i, 0);
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SCFG_BIOS = 0x0101;
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// WRAM mapping
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MBK[0][8] = 0;
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MBK[1][8] = 0;
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u32 mbk[12];
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memcpy(mbk, &NDSCart::CartROM[0x180], 12*4);
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MapNWRAM_A(0, mbk[0] & 0xFF);
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MapNWRAM_A(1, (mbk[0] >> 8) & 0xFF);
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MapNWRAM_A(2, (mbk[0] >> 16) & 0xFF);
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MapNWRAM_A(3, mbk[0] >> 24);
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MapNWRAM_B(0, mbk[1] & 0xFF);
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MapNWRAM_B(1, (mbk[1] >> 8) & 0xFF);
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MapNWRAM_B(2, (mbk[1] >> 16) & 0xFF);
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MapNWRAM_B(3, mbk[1] >> 24);
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MapNWRAM_B(4, mbk[2] & 0xFF);
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MapNWRAM_B(5, (mbk[2] >> 8) & 0xFF);
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MapNWRAM_B(6, (mbk[2] >> 16) & 0xFF);
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MapNWRAM_B(7, mbk[2] >> 24);
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MapNWRAM_C(0, mbk[3] & 0xFF);
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MapNWRAM_C(1, (mbk[3] >> 8) & 0xFF);
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MapNWRAM_C(2, (mbk[3] >> 16) & 0xFF);
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MapNWRAM_C(3, mbk[3] >> 24);
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MapNWRAM_C(4, mbk[4] & 0xFF);
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MapNWRAM_C(5, (mbk[4] >> 8) & 0xFF);
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MapNWRAM_C(6, (mbk[4] >> 16) & 0xFF);
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MapNWRAM_C(7, mbk[4] >> 24);
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MapNWRAMRange(0, 0, mbk[5]);
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MapNWRAMRange(0, 1, mbk[6]);
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MapNWRAMRange(0, 2, mbk[7]);
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MapNWRAMRange(1, 0, mbk[8]);
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MapNWRAMRange(1, 1, mbk[9]);
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MapNWRAMRange(1, 2, mbk[10]);
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MBK[0][8] = mbk[11] & 0x00FFFF0F;
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MBK[1][8] = mbk[11] & 0x00FFFF0F;
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NDS::MapSharedWRAM(mbk[11] >> 24);
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}
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u32 arm9start = 0;
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// load the ARM9 secure area
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if (NDSCart::Header.ARM9ROMOffset >= 0x4000 && NDSCart::Header.ARM9ROMOffset < 0x8000)
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{
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u8 securearea[0x800];
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NDSCart::DecryptSecureArea(securearea);
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for (u32 i = 0; i < 0x800; i+=4)
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{
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ARM9Write32(NDSCart::Header.ARM9RAMAddress+i, *(u32*)&securearea[i]);
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arm9start += 4;
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}
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}
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for (u32 i = arm9start; i < NDSCart::Header.ARM9Size; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[NDSCart::Header.ARM9ROMOffset+i];
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ARM9Write32(NDSCart::Header.ARM9RAMAddress+i, tmp);
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}
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for (u32 i = 0; i < NDSCart::Header.ARM7Size; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[NDSCart::Header.ARM7ROMOffset+i];
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ARM7Write32(NDSCart::Header.ARM7RAMAddress+i, tmp);
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}
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if ((!dsmode) && (NDSCart::Header.DSiCryptoFlags & (1<<0)))
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{
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// load DSi-specific regions
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for (u32 i = 0; i < NDSCart::Header.DSiARM9iSize; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[NDSCart::Header.DSiARM9iROMOffset+i];
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ARM9Write32(NDSCart::Header.DSiARM9iRAMAddress+i, tmp);
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}
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for (u32 i = 0; i < NDSCart::Header.DSiARM7iSize; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[NDSCart::Header.DSiARM7iROMOffset+i];
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ARM7Write32(NDSCart::Header.DSiARM7iRAMAddress+i, tmp);
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}
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// decrypt any modcrypt areas
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if (NDSCart::Header.DSiCryptoFlags & (1<<1))
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{
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DecryptModcryptArea(NDSCart::Header.DSiModcrypt1Offset,
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NDSCart::Header.DSiModcrypt1Size,
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NDSCart::Header.DSiARM9Hash);
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DecryptModcryptArea(NDSCart::Header.DSiModcrypt2Offset,
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NDSCart::Header.DSiModcrypt2Size,
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NDSCart::Header.DSiARM7Hash);
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}
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}
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// CHECKME: some of these are 'only for NDS ROM', presumably
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// only for when loading a cart? (as opposed to DSiWare)
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for (u32 i = 0; i < 0x160; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[i];
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ARM9Write32(0x02FFFA80+i, tmp);
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ARM9Write32(0x02FFFE00+i, tmp);
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}
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for (u32 i = 0; i < 0x1000; i+=4)
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{
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u32 tmp = *(u32*)&NDSCart::CartROM[i];
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ARM9Write32(0x02FFC000+i, tmp);
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ARM9Write32(0x02FFE000+i, tmp);
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}
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if (DSi_NAND::Init(SDMMCFile, &DSi::ARM7iBIOS[0x8308]))
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{
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u8 userdata[0x1B0];
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DSi_NAND::ReadUserData(userdata);
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for (u32 i = 0; i < 0x128; i+=4)
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ARM9Write32(0x02000400+i, *(u32*)&userdata[0x88+i]);
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u8 hwinfoS[0xA4];
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u8 hwinfoN[0x9C];
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DSi_NAND::ReadHardwareInfo(hwinfoS, hwinfoN);
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for (u32 i = 0; i < 0x14; i+=4)
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ARM9Write32(0x02000600+i, *(u32*)&hwinfoN[0x88+i]);
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for (u32 i = 0; i < 0x18; i+=4)
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ARM9Write32(0x02FFFD68+i, *(u32*)&hwinfoS[0x88+i]);
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DSi_NAND::DeInit();
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}
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u8 nwifiver = SPI_Firmware::GetNWifiVersion();
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ARM9Write8(0x020005E0, nwifiver);
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// TODO: these should be taken from the wifi firmware in NAND
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// but, hey, this works too.
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if (nwifiver == 1)
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{
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ARM9Write16(0x020005E2, 0xB57E);
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ARM9Write32(0x020005E4, 0x00500400);
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ARM9Write32(0x020005E8, 0x00500000);
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ARM9Write32(0x020005EC, 0x0002E000);
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}
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else
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{
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ARM9Write16(0x020005E2, 0x5BCA);
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ARM9Write32(0x020005E4, 0x00520000);
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ARM9Write32(0x020005E8, 0x00520000);
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ARM9Write32(0x020005EC, 0x00020000);
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}
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// TODO: the shit at 02FFD7B0..02FFDC00
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// and some other extra shit?
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ARM9Write32(0x02FFFC00, NDSCart::CartID);
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ARM9Write16(0x02FFFC40, 0x0001); // boot indicator
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ARM9Write8(0x02FFFDFA, DSi_BPTWL::GetBootFlag() | 0x80);
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ARM9Write8(0x02FFFDFB, 0x01);
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NDS::ARM7BIOSProt = 0x20;
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// TODO: SCFG setup, permissions, etc
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SPI_Firmware::SetupDirectBoot(true);
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}
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void SoftReset()
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