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proper timings for ldr/str

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This commit is contained in:
Jaklyy
2024-06-25 09:08:11 -04:00
parent dbe00e72dd
commit 541e1e6388
3 changed files with 126 additions and 66 deletions
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21
src/ARM.h
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@ -142,8 +142,10 @@ public:
virtual void AddCycles_C() = 0;
virtual void AddCycles_CI(s32 numI) = 0;
virtual void AddCycles_CDI() = 0;
virtual void AddCycles_CD() = 0;
virtual void AddCycles_CDI_LDR() = 0;
virtual void AddCycles_CDI_LDM() = 0;
virtual void AddCycles_CD_STR() = 0;
virtual void AddCycles_CD_STM() = 0;
/*
inline void AddCycles_L(const u32 delay, const u32 reg1)
@ -325,9 +327,10 @@ public:
Cycles += numC + numI;
}
void AddCycles_CDI() override;
void AddCycles_CD() override;
void AddCycles_CDI_LDR() override;
void AddCycles_CDI_LDM() override;
void AddCycles_CD_STR() override;
void AddCycles_CD_STM() override;
#ifdef INTERLOCK
// fetch the value of a register while handling any interlock cycles
@ -460,8 +463,12 @@ public:
bool DataWrite32S(u32 addr, u32 val, bool dataabort = false) override;
void AddCycles_C() override;
void AddCycles_CI(s32 num) override;
void AddCycles_CDI() override;
void AddCycles_CD() override;
void AddCycles_CDI();
void AddCycles_CDI_LDR() override { AddCycles_CDI(); }
void AddCycles_CDI_LDM() override { AddCycles_CDI(); }
void AddCycles_CD();
void AddCycles_CD_STR() override { AddCycles_CD(); }
void AddCycles_CD_STM() override { AddCycles_CD(); }
#ifdef INTERLOCK
// fetch the value of a register while handling any interlock cycles