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https://github.com/melonDS-emu/melonDS.git
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Refactor the JIT to be object-oriented (#1879)
* Move TinyVector to a new file - So it's less sensitive to #include ordering * Forgot to include assert.h * Refactor ARMJIT_Memory into an object * Oops, forgot a declaration * Refactor ARMJIT to be contained in an object * Remove an unused function declaration * Add a missing #include * Remove a now-unused global * Use ARMJIT_Memory's own memory access functions * Fix some omissions in the ARM JIT * Move libandroid to be a member of ARMJIT_Memory instead of a global * Default-initialize most fields in ARMJIT_Compiler.h * Define NOOP_IF_NO_JIT * Finish refactoring the JIT to be object-oriented
This commit is contained in:
Jesse Talavera-Greenberg
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GitHub
GitHub
parent
f2d7a29015
commit
544fefa27f
142
src/ARMJIT.h
142
src/ARMJIT.h
@ -19,49 +19,147 @@
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#ifndef ARMJIT_H
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#define ARMJIT_H
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#include <memory>
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#include "types.h"
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#include "ARM.h"
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#include "ARM_InstrInfo.h"
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#include "ARMJIT_Memory.h"
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#include "JitBlock.h"
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#if defined(__APPLE__) && defined(__aarch64__)
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#include <pthread.h>
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#endif
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#include "ARMJIT_Compiler.h"
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class ARM;
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namespace ARMJIT
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{
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class JitBlock;
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class ARMJIT
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{
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public:
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ARMJIT() noexcept : JITCompiler(*this), Memory(*this) {}
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~ARMJIT() noexcept NOOP_IF_NO_JIT;
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void InvalidateByAddr(u32) noexcept NOOP_IF_NO_JIT;
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void CheckAndInvalidateWVRAM(int) noexcept NOOP_IF_NO_JIT;
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void CheckAndInvalidateITCM() noexcept NOOP_IF_NO_JIT;
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void Reset() noexcept NOOP_IF_NO_JIT;
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void JitEnableWrite() noexcept NOOP_IF_NO_JIT;
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void JitEnableExecute() noexcept NOOP_IF_NO_JIT;
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void CompileBlock(ARM* cpu) noexcept NOOP_IF_NO_JIT;
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void ResetBlockCache() noexcept NOOP_IF_NO_JIT;
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typedef void (*JitBlockEntry)();
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#ifdef JIT_ENABLED
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template <u32 num, int region>
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void CheckAndInvalidate(u32 addr) noexcept
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{
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u32 localAddr = Memory.LocaliseAddress(region, num, addr);
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if (CodeMemRegions[region][(localAddr & 0x7FFFFFF) / 512].Code & (1 << ((localAddr & 0x1FF) / 16)))
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InvalidateByAddr(localAddr);
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}
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JitBlockEntry LookUpBlock(u32 num, u64* entries, u32 offset, u32 addr) noexcept;
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bool SetupExecutableRegion(u32 num, u32 blockAddr, u64*& entry, u32& start, u32& size) noexcept;
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u32 LocaliseCodeAddress(u32 num, u32 addr) const noexcept;
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#else
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template <u32, int>
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void CheckAndInvalidate(u32) noexcept {}
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#endif
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extern int MaxBlockSize;
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extern bool LiteralOptimizations;
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extern bool BranchOptimizations;
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extern bool FastMemory;
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ARMJIT_Memory Memory;
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int MaxBlockSize {};
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bool LiteralOptimizations = false;
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bool BranchOptimizations = false;
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bool FastMemory = false;
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void Init();
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void DeInit();
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TinyVector<u32> InvalidLiterals {};
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private:
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friend class ::ARMJIT_Memory;
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void blockSanityCheck(u32 num, u32 blockAddr, JitBlockEntry entry) noexcept;
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void RetireJitBlock(JitBlock* block) noexcept;
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void Reset();
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Compiler JITCompiler;
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std::unordered_map<u32, JitBlock*> JitBlocks9 {};
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std::unordered_map<u32, JitBlock*> JitBlocks7 {};
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void CheckAndInvalidateITCM();
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void CheckAndInvalidateWVRAM(int bank);
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std::unordered_map<u32, JitBlock*> RestoreCandidates {};
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void InvalidateByAddr(u32 pseudoPhysical);
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template <u32 num, int region>
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void CheckAndInvalidate(u32 addr);
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AddressRange CodeIndexITCM[ITCMPhysicalSize / 512] {};
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AddressRange CodeIndexMainRAM[NDS::MainRAMMaxSize / 512] {};
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AddressRange CodeIndexSWRAM[NDS::SharedWRAMSize / 512] {};
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AddressRange CodeIndexVRAM[0x100000 / 512] {};
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AddressRange CodeIndexARM9BIOS[sizeof(NDS::ARM9BIOS) / 512] {};
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AddressRange CodeIndexARM7BIOS[sizeof(NDS::ARM7BIOS) / 512] {};
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AddressRange CodeIndexARM7WRAM[NDS::ARM7WRAMSize / 512] {};
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AddressRange CodeIndexARM7WVRAM[0x40000 / 512] {};
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AddressRange CodeIndexBIOS9DSi[0x10000 / 512] {};
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AddressRange CodeIndexBIOS7DSi[0x10000 / 512] {};
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AddressRange CodeIndexNWRAM_A[DSi::NWRAMSize / 512] {};
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AddressRange CodeIndexNWRAM_B[DSi::NWRAMSize / 512] {};
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AddressRange CodeIndexNWRAM_C[DSi::NWRAMSize / 512] {};
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void CompileBlock(ARM* cpu);
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u64 FastBlockLookupITCM[ITCMPhysicalSize / 2] {};
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u64 FastBlockLookupMainRAM[NDS::MainRAMMaxSize / 2] {};
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u64 FastBlockLookupSWRAM[NDS::SharedWRAMSize / 2] {};
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u64 FastBlockLookupVRAM[0x100000 / 2] {};
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u64 FastBlockLookupARM9BIOS[sizeof(NDS::ARM9BIOS) / 2] {};
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u64 FastBlockLookupARM7BIOS[sizeof(NDS::ARM7BIOS) / 2] {};
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u64 FastBlockLookupARM7WRAM[NDS::ARM7WRAMSize / 2] {};
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u64 FastBlockLookupARM7WVRAM[0x40000 / 2] {};
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u64 FastBlockLookupBIOS9DSi[0x10000 / 2] {};
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u64 FastBlockLookupBIOS7DSi[0x10000 / 2] {};
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u64 FastBlockLookupNWRAM_A[DSi::NWRAMSize / 2] {};
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u64 FastBlockLookupNWRAM_B[DSi::NWRAMSize / 2] {};
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u64 FastBlockLookupNWRAM_C[DSi::NWRAMSize / 2] {};
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void ResetBlockCache();
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AddressRange* const CodeMemRegions[ARMJIT_Memory::memregions_Count] =
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{
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NULL,
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CodeIndexITCM,
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NULL,
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CodeIndexARM9BIOS,
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CodeIndexMainRAM,
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CodeIndexSWRAM,
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NULL,
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CodeIndexVRAM,
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CodeIndexARM7BIOS,
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CodeIndexARM7WRAM,
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NULL,
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NULL,
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CodeIndexARM7WVRAM,
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CodeIndexBIOS9DSi,
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CodeIndexBIOS7DSi,
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CodeIndexNWRAM_A,
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CodeIndexNWRAM_B,
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CodeIndexNWRAM_C
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};
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JitBlockEntry LookUpBlock(u32 num, u64* entries, u32 offset, u32 addr);
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bool SetupExecutableRegion(u32 num, u32 blockAddr, u64*& entry, u32& start, u32& size);
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void JitEnableWrite();
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void JitEnableExecute();
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u64* const FastBlockLookupRegions[ARMJIT_Memory::memregions_Count] =
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{
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NULL,
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FastBlockLookupITCM,
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NULL,
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FastBlockLookupARM9BIOS,
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FastBlockLookupMainRAM,
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FastBlockLookupSWRAM,
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NULL,
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FastBlockLookupVRAM,
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FastBlockLookupARM7BIOS,
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FastBlockLookupARM7WRAM,
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NULL,
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NULL,
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FastBlockLookupARM7WVRAM,
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FastBlockLookupBIOS9DSi,
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FastBlockLookupBIOS7DSi,
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FastBlockLookupNWRAM_A,
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FastBlockLookupNWRAM_B,
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FastBlockLookupNWRAM_C
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};
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};
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}
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// Defined in assembly
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extern "C" void ARM_Dispatch(ARM* cpu, ARMJIT::JitBlockEntry entry);
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#endif
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