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Refactor the JIT to be object-oriented (#1879)
* Move TinyVector to a new file - So it's less sensitive to #include ordering * Forgot to include assert.h * Refactor ARMJIT_Memory into an object * Oops, forgot a declaration * Refactor ARMJIT to be contained in an object * Remove an unused function declaration * Add a missing #include * Remove a now-unused global * Use ARMJIT_Memory's own memory access functions * Fix some omissions in the ARM JIT * Move libandroid to be a member of ARMJIT_Memory instead of a global * Default-initialize most fields in ARMJIT_Compiler.h * Define NOOP_IF_NO_JIT * Finish refactoring the JIT to be object-oriented
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@ -20,6 +20,7 @@
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#include "../ARMJIT_Internal.h"
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#include "../ARMInterpreter.h"
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#include "../ARMJIT.h"
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#if defined(__SWITCH__)
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#include <switch.h>
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@ -219,7 +220,7 @@ void Compiler::PopRegs(bool saveHiRegs, bool saveRegsToBeChanged)
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}
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}
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Compiler::Compiler()
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Compiler::Compiler(ARMJIT& jit) : Arm64Gen::ARM64XEmitter(), JIT(jit)
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{
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#ifdef __SWITCH__
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JitRWBase = aligned_alloc(0x1000, JitMemSize);
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@ -704,12 +705,12 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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if (JitMemMainSize - GetCodeOffset() < 1024 * 16)
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{
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Log(LogLevel::Debug, "JIT near memory full, resetting...\n");
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ResetBlockCache();
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JIT.ResetBlockCache();
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}
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if ((JitMemMainSize + JitMemSecondarySize) - OtherCodeRegion < 1024 * 8)
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{
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Log(LogLevel::Debug, "JIT far memory full, resetting...\n");
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ResetBlockCache();
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JIT.ResetBlockCache();
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}
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JitBlockEntry res = (JitBlockEntry)GetRXPtr();
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@ -722,7 +723,7 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
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CPSRDirty = false;
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if (hasMemInstr)
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MOVP2R(RMemBase, Num == 0 ? ARMJIT_Memory::FastMem9Start : ARMJIT_Memory::FastMem7Start);
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MOVP2R(RMemBase, Num == 0 ? JIT.Memory.FastMem9Start : JIT.Memory.FastMem7Start);
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for (int i = 0; i < instrsCount; i++)
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{
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@ -20,7 +20,6 @@
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#define ARMJIT_A64_COMPILER_H
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#include "../ARM.h"
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#include "../ARMJIT.h"
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#include "../dolphin/Arm64Emitter.h"
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@ -31,7 +30,7 @@
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namespace ARMJIT
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{
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class ARMJIT;
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const Arm64Gen::ARM64Reg RMemBase = Arm64Gen::X26;
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const Arm64Gen::ARM64Reg RCPSR = Arm64Gen::W27;
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const Arm64Gen::ARM64Reg RCycles = Arm64Gen::W28;
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@ -97,7 +96,7 @@ class Compiler : public Arm64Gen::ARM64XEmitter
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public:
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typedef void (Compiler::*CompileFunc)();
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Compiler();
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Compiler(ARMJIT& jit);
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~Compiler();
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void PushRegs(bool saveHiRegs, bool saveRegsToBeChanged, bool allowUnload = true);
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@ -243,6 +242,7 @@ public:
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OtherCodeRegion = offset;
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}
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ARMJIT& JIT;
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ptrdiff_t OtherCodeRegion;
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bool Exit;
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@ -62,9 +62,9 @@ u8* Compiler::RewriteMemAccess(u8* pc)
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bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
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{
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u32 localAddr = LocaliseCodeAddress(Num, addr);
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u32 localAddr = JIT.LocaliseCodeAddress(Num, addr);
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int invalidLiteralIdx = InvalidLiterals.Find(localAddr);
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int invalidLiteralIdx = JIT.InvalidLiterals.Find(localAddr);
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if (invalidLiteralIdx != -1)
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{
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return false;
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@ -111,7 +111,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
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if (size == 16)
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addressMask = ~1;
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if (ARMJIT::LiteralOptimizations && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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if (JIT.LiteralOptimizations && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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{
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u32 addr = R15 + offset.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
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@ -146,7 +146,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
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MOV(W0, rnMapped);
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}
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bool addrIsStatic = ARMJIT::LiteralOptimizations
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bool addrIsStatic = JIT.LiteralOptimizations
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&& RegCache.IsLiteral(rn) && offset.IsImm && !(flags & (memop_Writeback|memop_Post));
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u32 staticAddress;
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if (addrIsStatic)
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@ -185,10 +185,10 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
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MOV(rnMapped, W0);
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u32 expectedTarget = Num == 0
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? ARMJIT_Memory::ClassifyAddress9(addrIsStatic ? staticAddress : CurInstr.DataRegion)
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: ARMJIT_Memory::ClassifyAddress7(addrIsStatic ? staticAddress : CurInstr.DataRegion);
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? JIT.Memory.ClassifyAddress9(addrIsStatic ? staticAddress : CurInstr.DataRegion)
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: JIT.Memory.ClassifyAddress7(addrIsStatic ? staticAddress : CurInstr.DataRegion);
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if (ARMJIT::FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
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if (JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || JIT.Memory.IsFastmemCompatible(expectedTarget)))
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{
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ptrdiff_t memopStart = GetCodeOffset();
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LoadStorePatch patch;
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@ -225,7 +225,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
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{
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void* func = NULL;
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if (addrIsStatic)
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func = ARMJIT_Memory::GetFuncForAddr(CurCPU, staticAddress, flags & memop_Store, size);
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func = JIT.Memory.GetFuncForAddr(CurCPU, staticAddress, flags & memop_Store, size);
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PushRegs(false, false);
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@ -452,7 +452,7 @@ void Compiler::T_Comp_LoadPCRel()
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u32 offset = ((CurInstr.Instr & 0xFF) << 2);
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u32 addr = (R15 & ~0x2) + offset;
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if (!ARMJIT::LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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if (!JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
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}
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@ -494,11 +494,11 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
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Comp_AddCycles_CDI();
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int expectedTarget = Num == 0
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? ARMJIT_Memory::ClassifyAddress9(CurInstr.DataRegion)
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: ARMJIT_Memory::ClassifyAddress7(CurInstr.DataRegion);
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? JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
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: JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
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bool compileFastPath = ARMJIT::FastMemory
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&& store && !usermode && (CurInstr.Cond() < 0xE || ARMJIT_Memory::IsFastmemCompatible(expectedTarget));
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bool compileFastPath = JIT.FastMemory
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&& store && !usermode && (CurInstr.Cond() < 0xE || JIT.Memory.IsFastmemCompatible(expectedTarget));
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{
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s32 offset = decrement
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