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Assortment of fixes related to libnds v2/calico (#2197)

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* Support 8-bit writes to REG_IPCSYNC

* Support CP15 Trace Process ID register

* NWifi: expose correct manfid information in CIS0/CIS1 area

* NWifi: basic support for WMI_SET_PROBED_SSID

# Conflicts:
#	src/DSi_NWifi.cpp

* DSi_NAND: fix incorrect CTR IV calculation code
This commit is contained in:
fincs
2024-11-17 15:57:00 +01:00
committed by GitHub
parent 023dc0c446
commit 584508230f
6 changed files with 65 additions and 17 deletions
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8
src/CP15.cpp
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@ -44,6 +44,7 @@ void ARMv5::CP15Reset()
CP15Control = 0x2078; // dunno
RNGSeed = 44203;
TraceProcessID = 0;
DTCMSetting = 0;
ITCMSetting = 0;
@ -643,6 +644,10 @@ void ARMv5::CP15Write(u32 id, u32 val)
UpdateITCMSetting();
return;
case 0xD01:
TraceProcessID = val;
return;
case 0xF00:
//printf("cache debug index register %08X\n", val);
return;
@ -760,6 +765,9 @@ u32 ARMv5::CP15Read(u32 id) const
return DTCMSetting;
case 0x911:
return ITCMSetting;
case 0xD01:
return TraceProcessID;
}
if ((id & 0xF00) == 0xF00) // test/debug shit?