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implement correct/guess interlocks for remaining instructions

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This commit is contained in:
Jaklyy
2024-06-16 20:44:55 -04:00
parent debaaa0425
commit 5b37ca70d1
3 changed files with 168 additions and 133 deletions
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16
src/ARMInterpreter_Branch.cpp
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@ -46,15 +46,15 @@ void A_BLX_IMM(ARM* cpu)
cpu->JumpTo(cpu->R[15] + offset + 1);
}
void A_BX(ARM* cpu)
void A_BX(ARM* cpu) // verify interlock
{
cpu->JumpTo(cpu->R[cpu->CurInstr & 0xF]);
cpu->JumpTo(cpu->GetReg(cpu->CurInstr & 0xF));
}
void A_BLX_REG(ARM* cpu)
void A_BLX_REG(ARM* cpu) // verify interlock
{
u32 lr = cpu->R[15] - 4;
cpu->JumpTo(cpu->R[cpu->CurInstr & 0xF]);
cpu->JumpTo(cpu->GetReg(cpu->CurInstr & 0xF));
cpu->R[14] = lr;
}
@ -71,12 +71,12 @@ void T_BCOND(ARM* cpu)
cpu->AddCycles_C();
}
void T_BX(ARM* cpu)
void T_BX(ARM* cpu) // verify interlock
{
cpu->JumpTo(cpu->R[(cpu->CurInstr >> 3) & 0xF]);
cpu->JumpTo(cpu->GetReg((cpu->CurInstr >> 3) & 0xF));
}
void T_BLX_REG(ARM* cpu)
void T_BLX_REG(ARM* cpu) // verify interlock
{
if (cpu->Num==1)
{
@ -85,7 +85,7 @@ void T_BLX_REG(ARM* cpu)
}
u32 lr = cpu->R[15] - 1;
cpu->JumpTo(cpu->R[(cpu->CurInstr >> 3) & 0xF]);
cpu->JumpTo(cpu->GetReg((cpu->CurInstr >> 3) & 0xF));
cpu->R[14] = lr;
}