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correct handling of T bit changes w/o pipeline flush on arm9

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This commit is contained in:
Jaklyy 2024-11-08 01:02:36 -05:00
parent 5091061a39
commit 60a819c1ed
1 changed files with 2 additions and 2 deletions
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4
src/ARMInterpreter.cpp
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@ -129,7 +129,7 @@ void A_MSR_IMM(ARM* cpu)
if (cpu->CPSR & 0x20) [[unlikely]]
{
if (cpu->Num == 0) cpu->NextInstr[1] &= 0xFFFF; // checkme: probably not the right way to handle this
if (cpu->Num == 0) cpu->R[15] += 2; // pc should actually increment by 4 one more time after switching to thumb mode without a pipeline flush, this gets the same effect.
else
{
Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: MSR REG T bit change on ARM7\n");
@ -199,7 +199,7 @@ void A_MSR_REG(ARM* cpu)
if (cpu->CPSR & 0x20) [[unlikely]]
{
if (cpu->Num == 0) cpu->NextInstr[1] &= 0xFFFF; // checkme: probably not the right way to handle this
if (cpu->Num == 0) cpu->R[15] += 2; // pc should actually increment by 4 one more time after switching to thumb mode without a pipeline flush, this gets the same effect.
else
{
Platform::Log(Platform::LogLevel::Warn, "UNIMPLEMENTED: MSR REG T bit change on ARM7\n");