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moar shit

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StapleButter
2016-12-03 04:05:23 +01:00
parent ae6e9d96da
commit 6213245f3a
6 changed files with 295 additions and 71 deletions
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132
ARM_InstrTable.h
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@ -4,14 +4,14 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0000 0000 0000
A_AND_REG_LSL_IMM, A_AND_REG_LSL_REG, A_AND_REG_LSR_IMM, A_AND_REG_LSR_REG,
A_AND_REG_ASR_IMM, A_AND_REG_ASR_REG, A_AND_REG_ROR_IMM, A_AND_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_POST_REG,
A_UNK, A_LDRD_POST_REG, A_UNK, A_STRD_POST_REG,
// 0000 0001 0000
A_AND_REG_LSL_IMM_S, A_AND_REG_LSL_REG_S, A_AND_REG_LSR_IMM_S, A_AND_REG_LSR_REG_S,
A_AND_REG_ASR_IMM_S, A_AND_REG_ASR_REG_S, A_AND_REG_ROR_IMM_S, A_AND_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_POST_REG,
A_UNK, A_LDRSB_POST_REG, A_UNK, A_LDRSH_POST_REG,
// 0000 0010 0000
A_EOR_REG_LSL_IMM, A_EOR_REG_LSL_REG, A_EOR_REG_LSR_IMM, A_EOR_REG_LSR_REG,
@ -28,14 +28,14 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0000 0100 0000
A_SUB_REG_LSL_IMM, A_SUB_REG_LSL_REG, A_SUB_REG_LSR_IMM, A_SUB_REG_LSR_REG,
A_SUB_REG_ASR_IMM, A_SUB_REG_ASR_REG, A_SUB_REG_ROR_IMM, A_SUB_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_POST_IMM,
A_UNK, A_LDRD_POST_IMM, A_UNK, A_STRD_POST_IMM,
// 0000 0101 0000
A_SUB_REG_LSL_IMM_S, A_SUB_REG_LSL_REG_S, A_SUB_REG_LSR_IMM_S, A_SUB_REG_LSR_REG_S,
A_SUB_REG_ASR_IMM_S, A_SUB_REG_ASR_REG_S, A_SUB_REG_ROR_IMM_S, A_SUB_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_POST_IMM,
A_UNK, A_LDRSB_POST_IMM, A_UNK, A_LDRSH_POST_IMM,
// 0000 0110 0000
A_RSB_REG_LSL_IMM, A_RSB_REG_LSL_REG, A_RSB_REG_LSR_IMM, A_RSB_REG_LSR_REG,
@ -52,14 +52,14 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0000 1000 0000
A_ADD_REG_LSL_IMM, A_ADD_REG_LSL_REG, A_ADD_REG_LSR_IMM, A_ADD_REG_LSR_REG,
A_ADD_REG_ASR_IMM, A_ADD_REG_ASR_REG, A_ADD_REG_ROR_IMM, A_ADD_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_POST_REG,
A_UNK, A_LDRD_POST_REG, A_UNK, A_STRD_POST_REG,
// 0000 1001 0000
A_ADD_REG_LSL_IMM_S, A_ADD_REG_LSL_REG_S, A_ADD_REG_LSR_IMM_S, A_ADD_REG_LSR_REG_S,
A_ADD_REG_ASR_IMM_S, A_ADD_REG_ASR_REG_S, A_ADD_REG_ROR_IMM_S, A_ADD_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_POST_REG,
A_UNK, A_LDRSB_POST_REG, A_UNK, A_LDRSH_POST_REG,
// 0000 1010 0000
A_ADC_REG_LSL_IMM, A_ADC_REG_LSL_REG, A_ADC_REG_LSR_IMM, A_ADC_REG_LSR_REG,
@ -76,14 +76,14 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0000 1100 0000
A_SBC_REG_LSL_IMM, A_SBC_REG_LSL_REG, A_SBC_REG_LSR_IMM, A_SBC_REG_LSR_REG,
A_SBC_REG_ASR_IMM, A_SBC_REG_ASR_REG, A_SBC_REG_ROR_IMM, A_SBC_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_POST_IMM,
A_UNK, A_LDRD_POST_IMM, A_UNK, A_STRD_POST_IMM,
// 0000 1101 0000
A_SBC_REG_LSL_IMM_S, A_SBC_REG_LSL_REG_S, A_SBC_REG_LSR_IMM_S, A_SBC_REG_LSR_REG_S,
A_SBC_REG_ASR_IMM_S, A_SBC_REG_ASR_REG_S, A_SBC_REG_ROR_IMM_S, A_SBC_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_POST_IMM,
A_UNK, A_LDRSB_POST_IMM, A_UNK, A_LDRSH_POST_IMM,
// 0000 1110 0000
A_RSC_REG_LSL_IMM, A_RSC_REG_LSL_REG, A_RSC_REG_LSR_IMM, A_RSC_REG_LSR_REG,
@ -102,98 +102,98 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0001 0000 0000
A_MRS, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
// 0001 0001 0000
A_TST_REG_LSL_IMM, A_TST_REG_LSL_REG, A_TST_REG_LSR_IMM, A_TST_REG_LSR_REG,
A_TST_REG_ASR_IMM, A_TST_REG_ASR_REG, A_TST_REG_ROR_IMM, A_TST_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_REG,
A_UNK, A_LDRSB_REG, A_UNK, A_LDRSH_REG,
// 0001 0010 0000
A_MSR_REG, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MSR_REG, A_BX, A_UNK, A_BLX_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
// 0001 0011 0000
A_TEQ_REG_LSL_IMM, A_TEQ_REG_LSL_REG, A_TEQ_REG_LSR_IMM, A_TEQ_REG_LSR_REG,
A_TEQ_REG_ASR_IMM, A_TEQ_REG_ASR_REG, A_TEQ_REG_ROR_IMM, A_TEQ_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_REG,
A_UNK, A_LDRSB_REG, A_UNK, A_LDRSH_REG,
// 0001 0100 0000
A_MRS, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
// 0001 0101 0000
A_CMP_REG_LSL_IMM, A_CMP_REG_LSL_REG, A_CMP_REG_LSR_IMM, A_CMP_REG_LSR_REG,
A_CMP_REG_ASR_IMM, A_CMP_REG_ASR_REG, A_CMP_REG_ROR_IMM, A_CMP_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_IMM,
A_UNK, A_LDRSB_IMM, A_UNK, A_LDRSH_IMM,
// 0001 0110 0000
A_MSR_REG, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
// 0001 0111 0000
A_CMN_REG_LSL_IMM, A_CMN_REG_LSL_REG, A_CMN_REG_LSR_IMM, A_CMN_REG_LSR_REG,
A_CMN_REG_ASR_IMM, A_CMN_REG_ASR_REG, A_CMN_REG_ROR_IMM, A_CMN_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_IMM,
A_UNK, A_LDRSB_IMM, A_UNK, A_LDRSH_IMM,
// 0001 1000 0000
A_ORR_REG_LSL_IMM, A_ORR_REG_LSL_REG, A_ORR_REG_LSR_IMM, A_ORR_REG_LSR_REG,
A_ORR_REG_ASR_IMM, A_ORR_REG_ASR_REG, A_ORR_REG_ROR_IMM, A_ORR_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
// 0001 1001 0000
A_ORR_REG_LSL_IMM_S, A_ORR_REG_LSL_REG_S, A_ORR_REG_LSR_IMM_S, A_ORR_REG_LSR_REG_S,
A_ORR_REG_ASR_IMM_S, A_ORR_REG_ASR_REG_S, A_ORR_REG_ROR_IMM_S, A_ORR_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_REG,
A_UNK, A_LDRSB_REG, A_UNK, A_LDRSH_REG,
// 0001 1010 0000
A_MOV_REG_LSL_IMM, A_MOV_REG_LSL_REG, A_MOV_REG_LSR_IMM, A_MOV_REG_LSR_REG,
A_MOV_REG_ASR_IMM, A_MOV_REG_ASR_REG, A_MOV_REG_ROR_IMM, A_MOV_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
// 0001 1011 0000
A_MOV_REG_LSL_IMM_S, A_MOV_REG_LSL_REG_S, A_MOV_REG_LSR_IMM_S, A_MOV_REG_LSR_REG_S,
A_MOV_REG_ASR_IMM_S, A_MOV_REG_ASR_REG_S, A_MOV_REG_ROR_IMM_S, A_MOV_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_REG,
A_UNK, A_LDRSB_REG, A_UNK, A_LDRSH_REG,
// 0001 1100 0000
A_BIC_REG_LSL_IMM, A_BIC_REG_LSL_REG, A_BIC_REG_LSR_IMM, A_BIC_REG_LSR_REG,
A_BIC_REG_ASR_IMM, A_BIC_REG_ASR_REG, A_BIC_REG_ROR_IMM, A_BIC_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
// 0001 1101 0000
A_BIC_REG_LSL_IMM_S, A_BIC_REG_LSL_REG_S, A_BIC_REG_LSR_IMM_S, A_BIC_REG_LSR_REG_S,
A_BIC_REG_ASR_IMM_S, A_BIC_REG_ASR_REG_S, A_BIC_REG_ROR_IMM_S, A_BIC_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_IMM,
A_UNK, A_LDRSB_IMM, A_UNK, A_LDRSH_IMM,
// 0001 1110 0000
A_MVN_REG_LSL_IMM, A_MVN_REG_LSL_REG, A_MVN_REG_LSR_IMM, A_MVN_REG_LSR_REG,
A_MVN_REG_ASR_IMM, A_MVN_REG_ASR_REG, A_MVN_REG_ROR_IMM, A_MVN_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
// 0001 1111 0000
A_MVN_REG_LSL_IMM_S, A_MVN_REG_LSL_REG_S, A_MVN_REG_LSR_IMM_S, A_MVN_REG_LSR_REG_S,
A_MVN_REG_ASR_IMM_S, A_MVN_REG_ASR_REG_S, A_MVN_REG_ROR_IMM_S, A_MVN_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_LDRH_IMM,
A_UNK, A_LDRSB_IMM, A_UNK, A_LDRSH_IMM,
@ -1678,41 +1678,41 @@ INSTRFUNC_PROTO(THUMBInstrTable[1024]) =
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_BX, T_BX, T_BLX_REG, T_BLX_REG,
// 0100 1000 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
// 0100 1100 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL, T_LDR_PCREL,
// 0101 0000 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_STR_REG, T_STR_REG, T_STR_REG, T_STR_REG,
T_STR_REG, T_STR_REG, T_STR_REG, T_STR_REG,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
// 0101 0100 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_STRB_REG, T_STRB_REG, T_STRB_REG, T_STRB_REG,
T_STRB_REG, T_STRB_REG, T_STRB_REG, T_STRB_REG,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
// 0101 1000 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_LDR_REG, T_LDR_REG, T_LDR_REG, T_LDR_REG,
T_LDR_REG, T_LDR_REG, T_LDR_REG, T_LDR_REG,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
// 0101 1100 00
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,
T_LDRB_REG, T_LDRB_REG, T_LDRB_REG, T_LDRB_REG,
T_LDRB_REG, T_LDRB_REG, T_LDRB_REG, T_LDRB_REG,
T_UNK, T_UNK, T_UNK, T_UNK,
T_UNK, T_UNK, T_UNK, T_UNK,