add MSR/MRS. also fix misc error with LDR ROR effect.

see shibboleet, I can do it too :>
This commit is contained in:
StapleButter
2016-12-03 02:09:04 +01:00
parent 23d584ca4c
commit 844ca45055
5 changed files with 113 additions and 16 deletions

View File

@ -67,7 +67,7 @@ namespace ARMInterpreter
#define A_LDR \
offset += cpu->R[(cpu->CurInstr>>16) & 0xF]; \
u32 val = ROR(cpu->Read32(offset), offset&0x3); \
u32 val = ROR(cpu->Read32(offset), ((offset&0x3)<<3)); \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
if (((cpu->CurInstr>>12) & 0xF) == 15) \
{ \
@ -83,7 +83,7 @@ namespace ARMInterpreter
#define A_LDR_POST \
u32 addr = cpu->R[(cpu->CurInstr>>16) & 0xF]; \
u32 val = ROR(cpu->Read32(addr, cpu->CurInstr & (1<<21)), addr&0x3); \
u32 val = ROR(cpu->Read32(addr, cpu->CurInstr & (1<<21)), ((addr&0x3)<<3)); \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
if (((cpu->CurInstr>>12) & 0xF) == 15) \
{ \