mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-24 14:49:53 -06:00
* AES-CCM decrypt
* fix a bunch of bugs
This commit is contained in:
36
src/DSi.cpp
36
src/DSi.cpp
@ -44,6 +44,8 @@ namespace DSi
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u32 BootAddr[2];
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u16 SCFG_Clock9;
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u16 SCFG_Clock7;
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u32 SCFG_MC;
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u32 MBK[2][9];
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@ -123,11 +125,19 @@ void Reset()
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SDMMC->Reset();
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SDIO->Reset();
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SCFG_Clock9 = 0x0187; // CHECKME
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SCFG_Clock7 = 0x0187;
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SCFG_MC = 0x0011;
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// LCD init flag
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GPU::DispStat[0] |= (1<<6);
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GPU::DispStat[1] |= (1<<6);
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NDS::MapSharedWRAM(3);
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// TEST
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u8 derp[16] = {0xE5, 0xCC, 0x5A, 0x8B, 0x56, 0xD0, 0xC9, 0x72, 0x9C, 0x17, 0xE8, 0xDC, 0x39, 0x12, 0x36, 0xA9};
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for (int i = 0; i < 16; i+=4) ARM7Write32(0x03FFC580+i, *(u32*)&derp[i]);
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}
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bool LoadBIOS()
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@ -1007,7 +1017,7 @@ u16 ARM9IORead16(u32 addr)
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{
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switch (addr)
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{
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case 0x04004004: return 0; // TODO
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case 0x04004004: return SCFG_Clock9;
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case 0x04004010: return SCFG_MC & 0xFFFF;
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CASE_READ16_32BIT(0x04004040, MBK[0][0])
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@ -1079,6 +1089,16 @@ void ARM9IOWrite8(u32 addr, u8 val)
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{
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switch (addr)
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{
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case 0x04000301:
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// TODO: OPTIONAL PERFORMANCE HACK
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// the DSi ARM9 BIOS has a bug where the IRQ wait function attempts to use (ARM7-only) HALTCNT
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// effectively causing it to wait in a busy loop.
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// for better DSi performance, we can implement an actual IRQ wait here.
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// in practice this would only matter when running DS software in DSi mode (ie already a hack).
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// DSi software does not use the BIOS IRQ wait function.
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//if (val == 0x80 && NDS::ARM9->R[15] == 0xFFFF0268) NDS::ARM9->Halt(1);
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return;
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case 0x04004040: MapNWRAM_A(0, val); return;
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case 0x04004041: MapNWRAM_A(1, val); return;
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case 0x04004042: MapNWRAM_A(2, val); return;
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@ -1108,6 +1128,12 @@ void ARM9IOWrite16(u32 addr, u16 val)
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{
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switch (addr)
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{
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case 0x04004004:
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// TODO: actually change clock!
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printf("CLOCK9=%04X\n", val);
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SCFG_Clock9 = val & 0x0187;
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return;
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case 0x04004040:
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MapNWRAM_A(0, val & 0xFF);
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MapNWRAM_A(1, val >> 8);
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@ -1267,7 +1293,7 @@ u16 ARM7IORead16(u32 addr)
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case 0x04000218: return NDS::IE2;
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case 0x0400021C: return NDS::IF2;
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case 0x04004004: return 0x0187;
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case 0x04004004: return SCFG_Clock7;
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case 0x04004006: return 0; // JTAG register
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case 0x04004010: return SCFG_MC & 0xFFFF;
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@ -1390,6 +1416,10 @@ void ARM7IOWrite16(u32 addr, u16 val)
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case 0x04000218: NDS::IE2 = (val & 0x7FF7); NDS::UpdateIRQ(1); return;
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case 0x0400021C: NDS::IF2 &= ~(val & 0x7FF7); NDS::UpdateIRQ(1); return;
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case 0x04004004:
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SCFG_Clock7 = val & 0x0187;
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return;
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case 0x04004010:
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val &= 0x800C;
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if ((val & 0xC) == 0xC) val &= ~0xC; // hax
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@ -1482,7 +1512,7 @@ void ARM7IOWrite32(u32 addr, u32 val)
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{
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addr -= 0x04004440;
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int n = 0;
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while (addr > 0x30) { addr -= 0x30; n++; }
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while (addr >= 0x30) { addr -= 0x30; n++; }
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switch (addr >> 4)
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{
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