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jit: add compile option

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This commit is contained in:
RSDuck
2019-07-14 19:24:00 +02:00
parent fc82ca1a97
commit 86f2be7260
11 changed files with 134 additions and 51 deletions
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12
src/CP15.cpp
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@ -813,7 +813,9 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataCycles = 1;
*(u8*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -835,7 +837,9 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataCycles = 1;
*(u16*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -857,8 +861,10 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataCycles = 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -880,8 +886,10 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
{
DataCycles += 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2] = NULL;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2 + 1] = NULL;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr & 0x7FFF) >> 1) + 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))