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jit: add compile option

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This commit is contained in:
RSDuck 2019-07-14 19:24:00 +02:00
parent fc82ca1a97
commit 86f2be7260
11 changed files with 134 additions and 51 deletions
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36
CMakeLists.txt
View File

@ -14,6 +14,42 @@ if (NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE Release)
endif()
include(CheckSymbolExists)
function(detect_architecture symbol arch)
if (NOT DEFINED ARCHITECTURE)
set(CMAKE_REQUIRED_QUIET 1)
check_symbol_exists("${symbol}" "" ARCHITECTURE_${arch})
unset(CMAKE_REQUIRED_QUIET)
# The output variable needs to be unique across invocations otherwise
# CMake's crazy scope rules will keep it defined
if (ARCHITECTURE_${arch})
set(ARCHITECTURE "${arch}" PARENT_SCOPE)
set(ARCHITECTURE_${arch} 1 PARENT_SCOPE)
add_definitions(-DARCHITECTURE_${arch}=1)
endif()
endif()
endfunction()
detect_architecture("__x86_64__" x86_64)
detect_architecture("__i386__" x86)
detect_architecture("__arm__" ARM)
detect_architecture("__aarch64__" ARM64)
if (ARCHITECTURE STREQUAL x86_64)
option(ENABLE_JIT "Enable x64 JIT recompiler" ON)
endif()
if (ENABLE_JIT)
add_definitions(-DJIT_ENABLED)
endif()
if (CMAKE_BUILD_TYPE STREQUAL Release)
option(ENABLE_LTO "Enable link-time optimization" ON)
else()
option(ENABLE_LTO "Enable link-time optimization" OFF)
endif()
if (CMAKE_BUILD_TYPE STREQUAL Debug)
add_compile_options(-Og)
endif()

11
src/ARM.cpp
View File

@ -81,15 +81,8 @@ ARMv4::ARMv4() : ARM(1)
//
}
namespace ARMJIT {extern int instructionPopularityARM[ARMInstrInfo::ak_Count];}
void ARM::Reset()
{
FILE* blabla = fopen("fhhg", "w");
for (int i = 0; i < ARMInstrInfo::ak_Count; i++)
fprintf(blabla, "%d -> %dx\n", i, ARMJIT::instructionPopularityARM[i]);
fclose(blabla);
Cycles = 0;
Halted = 0;
@ -591,6 +584,7 @@ void ARMv5::Execute()
Halted = 0;
}
#ifdef JIT_ENABLED
void ARMv5::ExecuteJIT()
{
if (Halted)
@ -642,6 +636,7 @@ void ARMv5::ExecuteJIT()
if (Halted == 2)
Halted = 0;
}
#endif
void ARMv4::Execute()
{
@ -720,6 +715,7 @@ void ARMv4::Execute()
Halted = 0;
}
#ifdef JIT_ENABLED
void ARMv4::ExecuteJIT()
{
if (Halted)
@ -772,3 +768,4 @@ void ARMv4::ExecuteJIT()
if (Halted == 2)
Halted = 0;
}
#endif

6
src/ARM.h
View File

@ -52,7 +52,9 @@ public:
}
virtual void Execute() = 0;
#ifdef ENABLE_JIT
virtual void ExecuteJIT() = 0;
#endif
bool CheckCondition(u32 code)
{
@ -160,7 +162,9 @@ public:
void DataAbort();
void Execute();
#ifdef JIT_ENABLED
void ExecuteJIT();
#endif
// all code accesses are forced nonseq 32bit
u32 CodeRead32(u32 addr, bool branch);
@ -283,7 +287,9 @@ public:
void JumpTo(u32 addr, bool restorecpsr = false);
void Execute();
#ifdef JIT_ENABLED
void ExecuteJIT();
#endif
u16 CodeRead16(u32 addr)
{

33
src/ARMJIT_x64/ARMJIT_Compiler.cpp
View File

@ -4,7 +4,10 @@
#include <assert.h>
#include "../dolphin/CommonFuncs.h"
#ifdef _WIN32
#include <windows.h>
#else
#include <sys/mman.h>
#include <unistd.h>
@ -32,8 +35,6 @@ const int RegisterCache<Compiler, X64Reg>::NativeRegsAvailable =
#endif
;
int instructionPopularityARM[ARMInstrInfo::ak_Count];
/*
We'll repurpose this .bss memory
@ -41,16 +42,23 @@ int instructionPopularityARM[ARMInstrInfo::ak_Count];
u8 CodeMemory[1024 * 1024 * 32];
Compiler::Compiler()
{
{
#ifdef _WIN32
SYSTEM_INFO sysInfo;
GetSystemInfo(&sysInfo);
u64 pageSize = (u64)sysInfo.dwPageSize;
#else
u64 pagesize = sysconf(_SC_PAGE_SIZE);
u64 pageSize = sysconf(_SC_PAGE_SIZE);
#endif
u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pagesize - 1)) + pagesize);
u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pagesize - 1)) - (u64)pageAligned;
u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pageSize - 1)) + pageSize);
u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pageSize - 1)) - (u64)pageAligned;
#ifdef _WIN32
DWORD dummy;
VirtualProtect(pageAligned, alignedSize, PAGE_EXECUTE_READWRITE, &dummy);
#else
mprotect(pageAligned, alignedSize, PROT_EXEC | PROT_READ | PROT_WRITE);
#endif
@ -58,13 +66,10 @@ Compiler::Compiler()
region = pageAligned;
region_size = alignedSize;
total_region_size = region_size;
}
ClearCodeSpace();
SetCodePtr(pageAligned);
memset(instructionPopularityARM, 0, sizeof(instructionPopularityARM));
for (int i = 0; i < 3; i++)
{
for (int j = 0; j < 2; j++)
@ -163,7 +168,10 @@ Compiler::Compiler()
RET();
}
ResetStart = (void*)GetWritableCodePtr();
// move the region forward to prevent overwriting the generated functions
region_size -= GetWritableCodePtr() - region;
total_region_size = region_size;
region = GetWritableCodePtr();
}
void Compiler::LoadCPSR()
@ -338,7 +346,7 @@ const Compiler::CompileFunc T_Comp[ARMInstrInfo::tk_Count] = {
void Compiler::Reset()
{
SetCodePtr((u8*)ResetStart);
ClearCodeSpace();
}
CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount)
@ -375,9 +383,6 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
? T_Comp[CurInstr.Info.Kind]
: A_Comp[CurInstr.Info.Kind];
if (!Thumb)
instructionPopularityARM[CurInstr.Info.Kind] += comp == NULL;
if (comp == NULL || i == instrsCount - 1)
{
MOV(32, MDisp(RCPU, offsetof(ARM, R[15])), Imm32(R15));

1
src/ARMJIT_x64/ARMJIT_Compiler.h
View File

@ -132,7 +132,6 @@ public:
return Gen::R(RegCache.Mapping[reg]);
}
void* ResetStart;
void* MemoryFuncs9[3][2];
void* MemoryFuncs7[3][2][2];

5
src/CMakeLists.txt
View File

@ -49,7 +49,10 @@ add_library(core STATIC
WifiAP.cpp
tiny-AES-c/aes.c
)
if (ENABLE_JIT)
target_sources(core PRIVATE
ARMJIT.cpp
ARMJIT_x64/ARMJIT_Compiler.cpp
ARMJIT_x64/ARMJIT_ALU.cpp
@ -60,8 +63,8 @@ add_library(core STATIC
dolphin/x64ABI.cpp
dolphin/x64CPUDetect.cpp
dolphin/x64Emitter.cpp
dolphin/MemoryUtil.cpp
)
endif()
if (WIN32)
target_link_libraries(core ole32 comctl32 ws2_32 opengl32)

12
src/CP15.cpp
View File

@ -813,7 +813,9 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataCycles = 1;
*(u8*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -835,7 +837,9 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataCycles = 1;
*(u16*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -857,8 +861,10 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataCycles = 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
@ -880,8 +886,10 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
{
DataCycles += 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2] = NULL;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2 + 1] = NULL;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr & 0x7FFF) >> 1) + 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))

4
src/Config.cpp
View File

@ -37,8 +37,10 @@ char DSiBIOS7Path[1024];
char DSiFirmwarePath[1024];
char DSiNANDPath[1024];
#ifdef JIT_ENABLED
bool JIT_Enable = false;
int JIT_MaxBlockSize = 12;
#endif
ConfigEntry ConfigFile[] =
{
@ -51,8 +53,10 @@ ConfigEntry ConfigFile[] =
{"DSiFirmwarePath", 1, DSiFirmwarePath, 0, "", 1023},
{"DSiNANDPath", 1, DSiNANDPath, 0, "", 1023},
#ifdef JIT_ENABLED
{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 10, NULL, 0},
#endif
{"", -1, NULL, 0, NULL, 0}
};

2
src/Config.h
View File

@ -51,8 +51,10 @@ extern char DSiBIOS7Path[1024];
extern char DSiFirmwarePath[1024];
extern char DSiNANDPath[1024];
#ifdef JIT_ENABLED
extern bool JIT_Enable;
extern int JIT_MaxBlockSize;
#endif
}

26
src/NDS.cpp
View File

@ -169,7 +169,9 @@ bool Init()
ARM9 = new ARMv5();
ARM7 = new ARMv4();
#ifdef JIT_ENABLED
ARMJIT::Init();
#endif
DMAs[0] = new DMA(0, 0);
DMAs[1] = new DMA(0, 1);
@ -203,7 +205,9 @@ void DeInit()
delete ARM9;
delete ARM7;
#ifdef JIT_ENABLED
ARMJIT::DeInit();
#endif
for (int i = 0; i < 8; i++)
delete DMAs[i];
@ -566,7 +570,9 @@ void Reset()
KeyCnt = 0;
RCnt = 0;
#ifdef JIT_ENABLED
ARMJIT::InvalidateBlockCache();
#endif
NDSCart::Reset();
GBACart::Reset();
@ -794,10 +800,12 @@ bool DoSavestate(Savestate* file)
GPU::SetPowerCnt(PowerControl9);
}
#ifdef JIT_ENABLED
if (!file->Saving)
{
ARMJIT::InvalidateBlockCache();
}
#endif
return true;
}
@ -923,9 +931,11 @@ u32 RunFrame()
}
else
{
#ifdef JIT_ENABLED
if (EnableJIT)
ARM9->ExecuteJIT();
else
#endif
ARM9->Execute();
}
@ -949,9 +959,11 @@ u32 RunFrame()
}
else
{
#ifdef JIT_ENABLED
if (EnableJIT)
ARM7->ExecuteJIT();
else
#endif
ARM7->Execute();
}
@ -984,9 +996,11 @@ u32 RunFrame()
u32 RunFrame()
{
#ifdef JIT_ENABLED
if (Config::JIT_Enable)
return RunFrame<true>();
else
#endif
return RunFrame<false>();
}
@ -1998,7 +2012,9 @@ u32 ARM9Read32(u32 addr)
void ARM9Write8(u32 addr, u8 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate16(0, addr);
#endif
switch (addr & 0xFF000000)
{
@ -2050,7 +2066,9 @@ void ARM9Write8(u32 addr, u8 val)
void ARM9Write16(u32 addr, u16 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate16(0, addr);
#endif
switch (addr & 0xFF000000)
{
@ -2118,7 +2136,9 @@ void ARM9Write16(u32 addr, u16 val)
void ARM9Write32(u32 addr, u32 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate32(0, addr);
#endif
switch (addr & 0xFF000000)
{
@ -2414,7 +2434,9 @@ u32 ARM7Read32(u32 addr)
void ARM7Write8(u32 addr, u8 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate16(1, addr);
#endif
switch (addr & 0xFF800000)
{
@ -2475,7 +2497,9 @@ void ARM7Write8(u32 addr, u8 val)
void ARM7Write16(u32 addr, u16 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate16(1, addr);
#endif
switch (addr & 0xFF800000)
{
@ -2546,7 +2570,9 @@ void ARM7Write16(u32 addr, u16 val)
void ARM7Write32(u32 addr, u32 val)
{
#ifdef JIT_ENABLED
ARMJIT::Invalidate32(1, addr);
#endif
switch (addr & 0xFF800000)
{

3
src/dolphin/CodeBlock.h
View File

@ -9,7 +9,6 @@
#include "Assert.h"
#include "../types.h"
#include "MemoryUtil.h"
namespace Common
{
@ -41,8 +40,6 @@ public:
CodeBlock() = default;
virtual ~CodeBlock()
{
if (region)
FreeCodeSpace();
}
CodeBlock(const CodeBlock&) = delete;
CodeBlock& operator=(const CodeBlock&) = delete;