mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2024-11-14 21:37:42 -07:00
Move GBACart-related global state into objects (#1870)
- RAII will now do the heavy lifting - Mark some methods as const or noexcept - Once the `NDS` object is finalized, most of these `assert`s can go away
This commit is contained in:
parent
b4ff911fa3
commit
8b47178add
@ -42,11 +42,6 @@ const char SOLAR_SENSOR_GAMECODES[10][5] =
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"A3IJ" // Boktai - The Sun Is in Your Hand (USA) (Sample)
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};
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std::unique_ptr<CartCommon> Cart;
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u16 OpenBusDecay;
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CartCommon::CartCommon()
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{
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}
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@ -77,7 +72,7 @@ int CartCommon::SetInput(int num, bool pressed)
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return -1;
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}
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u16 CartCommon::ROMRead(u32 addr)
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u16 CartCommon::ROMRead(u32 addr) const
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{
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return 0;
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}
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@ -243,7 +238,7 @@ void CartGame::LoadSave(const u8* savedata, u32 savelen)
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Platform::WriteGBASave(savedata, len, 0, len);
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}
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u16 CartGame::ROMRead(u32 addr)
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u16 CartGame::ROMRead(u32 addr) const
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{
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addr &= 0x01FFFFFF;
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@ -639,7 +634,7 @@ void CartRAMExpansion::DoSavestate(Savestate* file)
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file->Var16(&RAMEnable);
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}
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u16 CartRAMExpansion::ROMRead(u32 addr)
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u16 CartRAMExpansion::ROMRead(u32 addr) const
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{
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addr &= 0x01FFFFFF;
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@ -696,25 +691,12 @@ void CartRAMExpansion::ROMWrite(u32 addr, u16 val)
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}
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}
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bool Init()
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{
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Cart = nullptr;
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return true;
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}
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void DeInit()
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{
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Cart = nullptr;
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}
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void Reset()
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void GBACartSlot::Reset() noexcept
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{
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if (Cart) Cart->Reset();
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}
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void DoSavestate(Savestate* file)
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void GBACartSlot::DoSavestate(Savestate* file) noexcept
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{
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file->Section("GBAC"); // Game Boy Advance Cartridge
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@ -816,7 +798,7 @@ std::unique_ptr<CartCommon> ParseROM(const u8* romdata, u32 romlen)
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return cart;
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}
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bool InsertROM(std::unique_ptr<CartCommon>&& cart)
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bool GBACartSlot::InsertROM(std::unique_ptr<CartCommon>&& cart) noexcept
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{
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if (!cart) {
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Log(LogLevel::Error, "Failed to insert invalid GBA cart; existing cart (if any) was not ejected.\n");
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@ -844,14 +826,14 @@ bool InsertROM(std::unique_ptr<CartCommon>&& cart)
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return true;
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}
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bool LoadROM(const u8* romdata, u32 romlen)
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bool GBACartSlot::LoadROM(const u8* romdata, u32 romlen) noexcept
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{
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std::unique_ptr<CartCommon> data = ParseROM(romdata, romlen);
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return InsertROM(std::move(data));
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}
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void LoadSave(const u8* savedata, u32 savelen)
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void GBACartSlot::LoadSave(const u8* savedata, u32 savelen) noexcept
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{
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if (Cart)
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{
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@ -862,7 +844,7 @@ void LoadSave(const u8* savedata, u32 savelen)
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}
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}
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void LoadAddon(int type)
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void GBACartSlot::LoadAddon(int type) noexcept
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{
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switch (type)
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{
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@ -876,13 +858,13 @@ void LoadAddon(int type)
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}
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}
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void EjectCart()
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void GBACartSlot::EjectCart() noexcept
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{
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Cart = nullptr;
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}
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int SetInput(int num, bool pressed)
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int GBACartSlot::SetInput(int num, bool pressed) noexcept
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{
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if (Cart) return Cart->SetInput(num, pressed);
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@ -890,44 +872,28 @@ int SetInput(int num, bool pressed)
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}
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void SetOpenBusDecay(u16 val)
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{
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OpenBusDecay = val;
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}
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u16 ROMRead(u32 addr)
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u16 GBACartSlot::ROMRead(u32 addr) const noexcept
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{
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if (Cart) return Cart->ROMRead(addr);
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return ((addr >> 1) & 0xFFFF) | OpenBusDecay;
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}
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void ROMWrite(u32 addr, u16 val)
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void GBACartSlot::ROMWrite(u32 addr, u16 val) noexcept
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{
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if (Cart) Cart->ROMWrite(addr, val);
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}
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u8 SRAMRead(u32 addr)
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u8 GBACartSlot::SRAMRead(u32 addr) noexcept
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{
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if (Cart) return Cart->SRAMRead(addr);
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return 0xFF;
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}
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void SRAMWrite(u32 addr, u8 val)
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void GBACartSlot::SRAMWrite(u32 addr, u8 val) noexcept
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{
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if (Cart) Cart->SRAMWrite(addr, val);
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}
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u8* GetSaveMemory()
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{
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return Cart ? Cart->GetSaveMemory() : nullptr;
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}
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u32 GetSaveMemoryLength()
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{
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return Cart ? Cart->GetSaveMemoryLength() : 0;
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}
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}
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@ -53,7 +53,7 @@ public:
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virtual int SetInput(int num, bool pressed);
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virtual u16 ROMRead(u32 addr);
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virtual u16 ROMRead(u32 addr) const;
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virtual void ROMWrite(u32 addr, u16 val);
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virtual u8 SRAMRead(u32 addr);
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@ -83,7 +83,7 @@ public:
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virtual void SetupSave(u32 type) override;
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virtual void LoadSave(const u8* savedata, u32 savelen) override;
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virtual u16 ROMRead(u32 addr) override;
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virtual u16 ROMRead(u32 addr) const override;
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virtual void ROMWrite(u32 addr, u16 val) override;
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virtual u8 SRAMRead(u32 addr) override;
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@ -180,7 +180,7 @@ public:
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void DoSavestate(Savestate* file) override;
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u16 ROMRead(u32 addr) override;
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u16 ROMRead(u32 addr) const override;
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void ROMWrite(u32 addr, u16 val) override;
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private:
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@ -195,13 +195,52 @@ enum
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Input_SolarSensorUp,
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};
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extern std::unique_ptr<CartCommon> Cart;
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class GBACartSlot
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{
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public:
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GBACartSlot() noexcept = default;
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~GBACartSlot() noexcept = default;
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void Reset() noexcept;
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void DoSavestate(Savestate* file) noexcept;
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/// Applies the GBACartData to the emulator state and unloads an existing ROM if any.
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/// Upon successful insertion, \c cart will be nullptr and the global GBACart state
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/// (\c CartROM, CartInserted, etc.) will be updated.
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bool InsertROM(std::unique_ptr<CartCommon>&& cart) noexcept;
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bool LoadROM(const u8* romdata, u32 romlen) noexcept;
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void LoadSave(const u8* savedata, u32 savelen) noexcept;
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bool Init();
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void DeInit();
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void Reset();
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void LoadAddon(int type) noexcept;
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void DoSavestate(Savestate* file);
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void EjectCart() noexcept;
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// TODO: make more flexible, support nonbinary inputs
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int SetInput(int num, bool pressed) noexcept;
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void SetOpenBusDecay(u16 val) noexcept { OpenBusDecay = val; }
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u16 ROMRead(u32 addr) const noexcept;
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void ROMWrite(u32 addr, u16 val) noexcept;
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u8 SRAMRead(u32 addr) noexcept;
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void SRAMWrite(u32 addr, u8 val) noexcept;
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/// This function is intended to allow frontends to save and load SRAM
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/// without using melonDS APIs.
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/// Modifying the emulated SRAM for any other reason is strongly discouraged.
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/// The returned pointer may be invalidated if the emulator is reset,
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/// or when a new game is loaded.
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/// Consequently, don't store the returned pointer for any longer than necessary.
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/// @returns Pointer to this cart's SRAM if a cart is loaded and supports SRAM, otherwise \c nullptr.
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[[nodiscard]] u8* GetSaveMemory() noexcept { return Cart ? Cart->GetSaveMemory() : nullptr; }
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[[nodiscard]] const u8* GetSaveMemory() const noexcept { return Cart ? Cart->GetSaveMemory() : nullptr; }
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/// @returns The length of the buffer returned by ::GetSaveMemory()
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/// if a cart is loaded and supports SRAM, otherwise zero.
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[[nodiscard]] u32 GetSaveMemoryLength() const noexcept { return Cart ? Cart->GetSaveMemoryLength() : 0; }
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private:
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std::unique_ptr<CartCommon> Cart = nullptr;
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u16 OpenBusDecay = 0;
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};
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/// Parses the given ROM data and constructs a \c GBACart::CartCommon subclass
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/// that can be inserted into the emulator or used to extract information about the cart beforehand.
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@ -213,45 +252,6 @@ void DoSavestate(Savestate* file);
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/// or \c nullptr if the ROM data couldn't be parsed.
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std::unique_ptr<CartCommon> ParseROM(const u8* romdata, u32 romlen);
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/// Applies the GBACartData to the emulator state and unloads an existing ROM if any.
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/// Upon successful insertion, \c cart will be nullptr and the global GBACart state
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/// (\c CartROM, CartInserted, etc.) will be updated.
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bool InsertROM(std::unique_ptr<CartCommon>&& cart);
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bool LoadROM(const u8* romdata, u32 romlen);
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void LoadSave(const u8* savedata, u32 savelen);
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void LoadAddon(int type);
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void EjectCart();
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//bool LoadROM(const char* path, const char* sram);
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//bool LoadROM(const u8* romdata, u32 filelength, const char *sram);
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//void RelocateSave(const char* path, bool write);
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// TODO: make more flexible, support nonbinary inputs
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int SetInput(int num, bool pressed);
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void SetOpenBusDecay(u16 val);
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u16 ROMRead(u32 addr);
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void ROMWrite(u32 addr, u16 val);
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u8 SRAMRead(u32 addr);
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void SRAMWrite(u32 addr, u8 val);
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/// This function is intended to allow frontends to save and load SRAM
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/// without using melonDS APIs.
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/// Modifying the emulated SRAM for any other reason is strongly discouraged.
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/// The returned pointer may be invalidated if the emulator is reset,
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/// or when a new game is loaded.
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/// Consequently, don't store the returned pointer for any longer than necessary.
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/// @returns Pointer to this cart's SRAM if a cart is loaded and supports SRAM, otherwise \c nullptr.
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u8* GetSaveMemory();
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/// @returns The length of the buffer returned by ::GetSaveMemory()
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/// if a cart is loaded and supports SRAM, otherwise zero.
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u32 GetSaveMemoryLength();
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}
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#endif // GBACART_H
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136
src/NDS.cpp
136
src/NDS.cpp
@ -16,6 +16,7 @@
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <assert.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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@ -182,7 +183,7 @@ class SPU* SPU;
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class SPIHost* SPI;
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class RTC* RTC;
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class Wifi* Wifi;
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std::unique_ptr<GBACart::GBACartSlot> GBACartSlot;
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class AREngine* AREngine;
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bool Running;
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@ -226,9 +227,9 @@ bool Init()
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SPI = new class SPIHost();
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RTC = new class RTC();
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Wifi = new class Wifi();
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GBACartSlot = std::make_unique<GBACart::GBACartSlot>();
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if (!NDSCart::Init()) return false;
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if (!GBACart::Init()) return false;
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if (!GPU::Init()) return false;
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if (!DSi::Init()) return false;
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@ -259,7 +260,7 @@ void DeInit()
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delete Wifi; Wifi = nullptr;
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NDSCart::DeInit();
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GBACart::DeInit();
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GBACartSlot = nullptr;
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GPU::DeInit();
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DSi::DeInit();
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@ -644,7 +645,7 @@ void Reset()
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RCnt = 0;
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NDSCart::Reset();
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GBACart::Reset();
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GBACartSlot->Reset();
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GPU::Reset();
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SPU->Reset();
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SPI->Reset();
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@ -846,7 +847,7 @@ bool DoSavestate(Savestate* file)
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NDSCart::DoSavestate(file);
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if (ConsoleType == 0)
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GBACart::DoSavestate(file);
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GBACartSlot->DoSavestate(file);
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GPU::DoSavestate(file);
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SPU->DoSavestate(file);
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SPI->DoSavestate(file);
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@ -911,23 +912,28 @@ bool CartInserted()
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bool LoadGBACart(const u8* romdata, u32 romlen, const u8* savedata, u32 savelen)
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{
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if (!GBACart::LoadROM(romdata, romlen))
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if (!GBACartSlot)
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return false;
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if (!GBACartSlot->LoadROM(romdata, romlen))
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return false;
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if (savedata && savelen)
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GBACart::LoadSave(savedata, savelen);
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GBACartSlot->LoadSave(savedata, savelen);
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return true;
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}
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void LoadGBAAddon(int type)
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{
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GBACart::LoadAddon(type);
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if (GBACartSlot)
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GBACartSlot->LoadAddon(type);
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}
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void EjectGBACart()
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{
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GBACart::EjectCart();
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if (GBACartSlot)
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GBACartSlot->EjectCart();
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}
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void LoadBIOS()
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@ -1493,7 +1499,8 @@ void SetGBASlotTimings()
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// for example, the Cartridge Construction Kit relies on this to determine that
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// the GBA slot is empty
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GBACart::SetOpenBusDecay(openbus[(curcnt>>2) & 0x3]);
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assert(GBACartSlot != nullptr);
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GBACartSlot->SetOpenBusDecay(openbus[(curcnt>>2) & 0x3]);
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}
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@ -2161,12 +2168,14 @@ u8 ARM9Read8(u32 addr)
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case 0x08000000:
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case 0x09000000:
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if (ExMemCnt[0] & (1<<7)) return 0x00; // deselected CPU is 00h-filled
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if (addr & 0x1) return GBACart::ROMRead(addr-1) >> 8;
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return GBACart::ROMRead(addr) & 0xFF;
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assert(GBACartSlot != nullptr);
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if (addr & 0x1) return GBACartSlot->ROMRead(addr-1) >> 8;
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return GBACartSlot->ROMRead(addr) & 0xFF;
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case 0x0A000000:
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if (ExMemCnt[0] & (1<<7)) return 0x00; // deselected CPU is 00h-filled
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return GBACart::SRAMRead(addr);
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assert(GBACartSlot != nullptr);
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return GBACartSlot->SRAMRead(addr);
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}
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Log(LogLevel::Debug, "unknown arm9 read8 %08X\n", addr);
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@ -2221,12 +2230,14 @@ u16 ARM9Read16(u32 addr)
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case 0x08000000:
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case 0x09000000:
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if (ExMemCnt[0] & (1<<7)) return 0x0000; // deselected CPU is 00h-filled
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return GBACart::ROMRead(addr);
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assert(GBACartSlot != nullptr);
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return GBACartSlot->ROMRead(addr);
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case 0x0A000000:
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if (ExMemCnt[0] & (1<<7)) return 0x0000; // deselected CPU is 00h-filled
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return GBACart::SRAMRead(addr) |
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(GBACart::SRAMRead(addr+1) << 8);
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assert(GBACartSlot != nullptr);
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return GBACartSlot->SRAMRead(addr) |
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(GBACartSlot->SRAMRead(addr+1) << 8);
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}
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//if (addr) Log(LogLevel::Warn, "unknown arm9 read16 %08X %08X\n", addr, ARM9->R[15]);
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@ -2281,15 +2292,17 @@ u32 ARM9Read32(u32 addr)
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case 0x08000000:
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case 0x09000000:
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if (ExMemCnt[0] & (1<<7)) return 0x00000000; // deselected CPU is 00h-filled
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return GBACart::ROMRead(addr) |
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(GBACart::ROMRead(addr+2) << 16);
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assert(GBACartSlot != nullptr);
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return GBACartSlot->ROMRead(addr) |
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(GBACartSlot->ROMRead(addr+2) << 16);
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case 0x0A000000:
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if (ExMemCnt[0] & (1<<7)) return 0x00000000; // deselected CPU is 00h-filled
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return GBACart::SRAMRead(addr) |
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(GBACart::SRAMRead(addr+1) << 8) |
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(GBACart::SRAMRead(addr+2) << 16) |
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(GBACart::SRAMRead(addr+3) << 24);
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assert(GBACartSlot != nullptr);
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return GBACartSlot->SRAMRead(addr) |
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(GBACartSlot->SRAMRead(addr+1) << 8) |
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(GBACartSlot->SRAMRead(addr+2) << 16) |
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(GBACartSlot->SRAMRead(addr+3) << 24);
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}
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//Log(LogLevel::Warn, "unknown arm9 read32 %08X | %08X %08X\n", addr, ARM9->R[15], ARM9->R[12]);
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@ -2332,7 +2345,8 @@ void ARM9Write8(u32 addr, u8 val)
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case 0x0A000000:
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if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write
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GBACart::SRAMWrite(addr, val);
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assert(GBACartSlot != nullptr);
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GBACartSlot->SRAMWrite(addr, val);
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return;
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||||
}
|
||||
|
||||
@ -2392,13 +2406,15 @@ void ARM9Write16(u32 addr, u16 val)
|
||||
case 0x08000000:
|
||||
case 0x09000000:
|
||||
if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write
|
||||
GBACart::ROMWrite(addr, val);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->ROMWrite(addr, val);
|
||||
return;
|
||||
|
||||
case 0x0A000000:
|
||||
if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write
|
||||
GBACart::SRAMWrite(addr, val & 0xFF);
|
||||
GBACart::SRAMWrite(addr+1, val >> 8);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->SRAMWrite(addr, val & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+1, val >> 8);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2458,16 +2474,18 @@ void ARM9Write32(u32 addr, u32 val)
|
||||
case 0x08000000:
|
||||
case 0x09000000:
|
||||
if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write
|
||||
GBACart::ROMWrite(addr, val & 0xFFFF);
|
||||
GBACart::ROMWrite(addr+2, val >> 16);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->ROMWrite(addr, val & 0xFFFF);
|
||||
GBACartSlot->ROMWrite(addr+2, val >> 16);
|
||||
return;
|
||||
|
||||
case 0x0A000000:
|
||||
if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write
|
||||
GBACart::SRAMWrite(addr, val & 0xFF);
|
||||
GBACart::SRAMWrite(addr+1, (val >> 8) & 0xFF);
|
||||
GBACart::SRAMWrite(addr+2, (val >> 16) & 0xFF);
|
||||
GBACart::SRAMWrite(addr+3, val >> 24);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->SRAMWrite(addr, val & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+1, (val >> 8) & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+2, (val >> 16) & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+3, val >> 24);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2559,13 +2577,15 @@ u8 ARM7Read8(u32 addr)
|
||||
case 0x09000000:
|
||||
case 0x09800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x00; // deselected CPU is 00h-filled
|
||||
if (addr & 0x1) return GBACart::ROMRead(addr-1) >> 8;
|
||||
return GBACart::ROMRead(addr) & 0xFF;
|
||||
assert(GBACartSlot != nullptr);
|
||||
if (addr & 0x1) return GBACartSlot->ROMRead(addr-1) >> 8;
|
||||
return GBACartSlot->ROMRead(addr) & 0xFF;
|
||||
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x00; // deselected CPU is 00h-filled
|
||||
return GBACart::SRAMRead(addr);
|
||||
assert(GBACartSlot != nullptr);
|
||||
return GBACartSlot->SRAMRead(addr);
|
||||
}
|
||||
|
||||
Log(LogLevel::Debug, "unknown arm7 read8 %08X %08X %08X/%08X\n", addr, ARM7->R[15], ARM7->R[0], ARM7->R[1]);
|
||||
@ -2625,13 +2645,15 @@ u16 ARM7Read16(u32 addr)
|
||||
case 0x09000000:
|
||||
case 0x09800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x0000; // deselected CPU is 00h-filled
|
||||
return GBACart::ROMRead(addr);
|
||||
assert(GBACartSlot != nullptr);
|
||||
return GBACartSlot->ROMRead(addr);
|
||||
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x0000; // deselected CPU is 00h-filled
|
||||
return GBACart::SRAMRead(addr) |
|
||||
(GBACart::SRAMRead(addr+1) << 8);
|
||||
assert(GBACartSlot != nullptr);
|
||||
return GBACartSlot->SRAMRead(addr) |
|
||||
(GBACartSlot->SRAMRead(addr+1) << 8);
|
||||
}
|
||||
|
||||
Log(LogLevel::Debug, "unknown arm7 read16 %08X %08X\n", addr, ARM7->R[15]);
|
||||
@ -2691,16 +2713,18 @@ u32 ARM7Read32(u32 addr)
|
||||
case 0x09000000:
|
||||
case 0x09800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x00000000; // deselected CPU is 00h-filled
|
||||
return GBACart::ROMRead(addr) |
|
||||
(GBACart::ROMRead(addr+2) << 16);
|
||||
assert(GBACartSlot != nullptr);
|
||||
return GBACartSlot->ROMRead(addr) |
|
||||
(GBACartSlot->ROMRead(addr+2) << 16);
|
||||
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return 0x00000000; // deselected CPU is 00h-filled
|
||||
return GBACart::SRAMRead(addr) |
|
||||
(GBACart::SRAMRead(addr+1) << 8) |
|
||||
(GBACart::SRAMRead(addr+2) << 16) |
|
||||
(GBACart::SRAMRead(addr+3) << 24);
|
||||
assert(GBACartSlot != nullptr);
|
||||
return GBACartSlot->SRAMRead(addr) |
|
||||
(GBACartSlot->SRAMRead(addr+1) << 8) |
|
||||
(GBACartSlot->SRAMRead(addr+2) << 16) |
|
||||
(GBACartSlot->SRAMRead(addr+3) << 24);
|
||||
}
|
||||
|
||||
//Log(LogLevel::Warn, "unknown arm7 read32 %08X | %08X\n", addr, ARM7->R[15]);
|
||||
@ -2765,7 +2789,8 @@ void ARM7Write8(u32 addr, u8 val)
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write
|
||||
GBACart::SRAMWrite(addr, val);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->SRAMWrite(addr, val);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2839,14 +2864,15 @@ void ARM7Write16(u32 addr, u16 val)
|
||||
case 0x09000000:
|
||||
case 0x09800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write
|
||||
GBACart::ROMWrite(addr, val);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->ROMWrite(addr, val);
|
||||
return;
|
||||
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write
|
||||
GBACart::SRAMWrite(addr, val & 0xFF);
|
||||
GBACart::SRAMWrite(addr+1, val >> 8);
|
||||
GBACartSlot->SRAMWrite(addr, val & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+1, val >> 8);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2920,17 +2946,19 @@ void ARM7Write32(u32 addr, u32 val)
|
||||
case 0x09000000:
|
||||
case 0x09800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write
|
||||
GBACart::ROMWrite(addr, val & 0xFFFF);
|
||||
GBACart::ROMWrite(addr+2, val >> 16);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->ROMWrite(addr, val & 0xFFFF);
|
||||
GBACartSlot->ROMWrite(addr+2, val >> 16);
|
||||
return;
|
||||
|
||||
case 0x0A000000:
|
||||
case 0x0A800000:
|
||||
if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write
|
||||
GBACart::SRAMWrite(addr, val & 0xFF);
|
||||
GBACart::SRAMWrite(addr+1, (val >> 8) & 0xFF);
|
||||
GBACart::SRAMWrite(addr+2, (val >> 16) & 0xFF);
|
||||
GBACart::SRAMWrite(addr+3, val >> 24);
|
||||
assert(GBACartSlot != nullptr);
|
||||
GBACartSlot->SRAMWrite(addr, val & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+1, (val >> 8) & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+2, (val >> 16) & 0xFF);
|
||||
GBACartSlot->SRAMWrite(addr+3, val >> 24);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -20,11 +20,13 @@
|
||||
#define NDS_H
|
||||
|
||||
#include <string>
|
||||
#include <memory>
|
||||
#include <functional>
|
||||
|
||||
#include "Platform.h"
|
||||
#include "Savestate.h"
|
||||
#include "types.h"
|
||||
#include "GBACart.h"
|
||||
|
||||
// when touching the main loop/timing code, pls test a lot of shit
|
||||
// with this enabled, to make sure it doesn't desync
|
||||
@ -257,7 +259,7 @@ extern class SPU* SPU;
|
||||
extern class SPIHost* SPI;
|
||||
extern class RTC* RTC;
|
||||
extern class Wifi* Wifi;
|
||||
|
||||
extern std::unique_ptr<GBACart::GBACartSlot> GBACartSlot;
|
||||
extern class AREngine* AREngine;
|
||||
|
||||
const u32 ARM7WRAMSize = 0x10000;
|
||||
|
@ -384,7 +384,8 @@ void EmuThread::run()
|
||||
|
||||
if (Input::HotkeyPressed(HK_SolarSensorDecrease))
|
||||
{
|
||||
int level = GBACart::SetInput(GBACart::Input_SolarSensorDown, true);
|
||||
assert(NDS::GBACartSlot != nullptr);
|
||||
int level = NDS::GBACartSlot->SetInput(GBACart::Input_SolarSensorDown, true);
|
||||
if (level != -1)
|
||||
{
|
||||
char msg[64];
|
||||
@ -394,7 +395,8 @@ void EmuThread::run()
|
||||
}
|
||||
if (Input::HotkeyPressed(HK_SolarSensorIncrease))
|
||||
{
|
||||
int level = GBACart::SetInput(GBACart::Input_SolarSensorUp, true);
|
||||
assert(NDS::GBACartSlot != nullptr);
|
||||
int level = NDS::GBACartSlot->SetInput(GBACart::Input_SolarSensorUp, true);
|
||||
if (level != -1)
|
||||
{
|
||||
char msg[64];
|
||||
|
Loading…
Reference in New Issue
Block a user