separate SRAM setting coded, I guess

This commit is contained in:
StapleButter
2018-10-24 00:24:36 +02:00
parent 1edf2aed3b
commit 8b4ba2d8b9
7 changed files with 79 additions and 8 deletions

View File

@ -46,6 +46,8 @@ extern int Threaded3D;
extern int SocketBindAnyAddr;
extern int SavestateRelocSRAM;
}
#endif // CONFIG_H