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Slight polish to DMA (#1856)
* Slight polish to DMA - Default-initialize members explicitly - Mark some methods as const noexcept - Initialize DMA::MRAMBurstTable to DMATiming::MRAMDummy - Use the default destructor * Move DMA_Timings definitions to a source file - To ensure constant and unique addresses * Include some extra DMA members in the savestate * Simplify serializing the DMA table - Extend the dummy table to 256 bytes (same length as the real ones) * Revert the type change to DMA::DoSavestate * Keep the MRAMBurstTable inside the DMA class, instead of using a pointer - If we use a pointer to an external table, then we can't use it in savestates (else that external table gets overwritten)
This commit is contained in:
Jesse Talavera-Greenberg
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GitHub
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8c4e5af737
@ -19,6 +19,7 @@
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#ifndef DMA_TIMINGS_H
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#define DMA_TIMINGS_H
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#include <array>
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#include "types.h"
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namespace DMATiming
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@ -45,202 +46,15 @@ namespace DMATiming
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// setting. Timings are such that the nonseq setting only matters for the first
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// access, and minor edge cases (like the last of a 0x20000-byte block).
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constexpr u8 MRAMDummy[1] = {0};
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extern const std::array<u8, 256> MRAMDummy;
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constexpr u8 MRAMRead16Bursts[][256] =
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{
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// main RAM to regular 16bit or 32bit bus (similar)
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{7, 3, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2,
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7, 3, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2,
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7, 3,
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0},
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// main RAM to GBA/wifi, seq=4
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{8, 6, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5,
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0},
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// main RAM to GBA/wifi, seq=6
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{10, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7,
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12, 8,
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0},
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};
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extern const std::array<u8, 256> MRAMRead16Bursts[3];
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constexpr u8 MRAMRead32Bursts[][256] =
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{
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// main RAM to regular 16bit bus
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{9, 4, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 9,
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0},
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// main RAM to regular 32bit bus
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{9, 3, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2,
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0},
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// main RAM to GBA/wifi, seq=4
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{14, 10, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9,
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13, 10, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9,
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13, 10, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9,
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13, 10, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9,
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13, 10, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
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9, 9, 9, 9, 9, 9, 9,
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13,
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0},
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// main RAM to GBA/wifi, seq=6
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{18, 14, 13, 13, 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13, 13, 13, 13,
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17, 14, 13, 13, 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13, 13, 13, 13,
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17, 14, 13, 13, 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13, 13, 13, 13,
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17, 14, 13, 13, 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13, 13, 13, 13,
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17, 14, 13, 13, 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13, 13, 13, 13,
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17,
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0},
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};
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extern const std::array<u8, 256> MRAMRead32Bursts[4];
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constexpr u8 MRAMWrite16Bursts[][256] =
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{
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// regular 16bit or 32bit bus to main RAM (similar)
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{8, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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0},
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// GBA/wifi to main RAM, seq=4
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{10, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
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5, 5, 5, 5, 5, 5, 5, 5,
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0},
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// GBA/wifi to main RAM, seq=6
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{9, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
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7, 7, 7, 7, 7,
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0},
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};
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extern const std::array<u8, 256> MRAMWrite16Bursts[3];
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constexpr u8 MRAMWrite32Bursts[][256] =
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{
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// regular 16bit bus to main RAM
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{9, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
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0},
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// regular 32bit bus to main RAM
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{9, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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0},
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// GBA/wifi to main RAM, seq=4
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{15, 10, 10, 10, 10, 10, 10, 10, 10, 10,
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10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
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10, 10, 10, 10,
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0},
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// GBA/wifi to main RAM, seq=6
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{16, 14, 14, 14, 14, 14, 14, 14, 14, 14,
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14, 14, 14, 14, 14, 14, 14, 14,
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0},
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};
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extern const std::array<u8, 256> MRAMWrite32Bursts[4];
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}
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