From 8f5d8d1e125511e3420ffec991e6a6b0a7441d31 Mon Sep 17 00:00:00 2001
From: RSDuck <RSDuck@users.noreply.github.com>
Date: Wed, 8 Jul 2020 23:47:24 +0200
Subject: [PATCH] fix for fastmem when pc is used as immediate and (hopefully)
 make SIGSEGV handler work for aarch64 linux

---
 src/ARMJIT_Memory.cpp               | 14 +++++++++++---
 src/ARMJIT_x64/ARMJIT_Compiler.h    |  2 +-
 src/ARMJIT_x64/ARMJIT_LoadStore.cpp |  6 ++++++
 3 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/src/ARMJIT_Memory.cpp b/src/ARMJIT_Memory.cpp
index 4e1b0e05..936864dd 100644
--- a/src/ARMJIT_Memory.cpp
+++ b/src/ARMJIT_Memory.cpp
@@ -127,7 +127,6 @@ static LONG ExceptionHandler(EXCEPTION_POINTERS* exceptionInfo)
 		return EXCEPTION_CONTINUE_EXECUTION;
 	}
 
-	printf("miauz\n");
 	return EXCEPTION_CONTINUE_SEARCH;
 }
 
@@ -142,13 +141,22 @@ static void SigsegvHandler(int sig, siginfo_t* info, void* rawContext)
 	
 	ARMJIT_Memory::FaultDescription desc;
 	u8* curArea = (u8*)(NDS::CurCPU == 0 ? ARMJIT_Memory::FastMem9Start : ARMJIT_Memory::FastMem7Start);
+#ifdef __x86_64__
 	desc.EmulatedFaultAddr = (u8*)info->si_addr - curArea;
 	desc.FaultPC = context->uc_mcontext.gregs[REG_RIP];
+#else
+	desc.EmulatedFaultAddr = (u8*)info->fault_address - curArea;
+	desc.FaultPC = context->uc_mcontext.pc;
+#endif
 
 	s32 offset = 0;
 	if (ARMJIT_Memory::FaultHandler(&desc, offset))
 	{
+#ifdef __x86_64__
 		context->uc_mcontext.gregs[REG_RIP] += offset;
+#else
+		context->uc_mcontext.pc += offset;
+#endif
 		return;
 	}
 
@@ -355,8 +363,8 @@ void SetCodeProtection(int region, u32 offset, bool protect)
 	{
 		Mapping& mapping = Mappings[region][i];
 
-//		if (offset < mapping.LocalOffset || offset >= mapping.LocalOffset + mapping.Size)
-//			continue;
+		if (offset < mapping.LocalOffset || offset >= mapping.LocalOffset + mapping.Size)
+			continue;
 
 		u32 effectiveAddr = mapping.Addr + (offset - mapping.LocalOffset);
 		if (mapping.Num == 0
diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.h b/src/ARMJIT_x64/ARMJIT_Compiler.h
index 0fe0147e..9a64d09f 100644
--- a/src/ARMJIT_x64/ARMJIT_Compiler.h
+++ b/src/ARMJIT_x64/ARMJIT_Compiler.h
@@ -179,7 +179,7 @@ public:
 
     Gen::OpArg MapReg(int reg)
     {
-        if (reg == 15 && RegCache.Mapping[reg] == Gen::INVALID_REG)
+        if (reg == 15 && !(RegCache.LoadedRegs & (1 << 15)))
             return Gen::Imm32(R15);
 
         assert(RegCache.Mapping[reg] != Gen::INVALID_REG);
diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
index aa84105c..57d98ccc 100644
--- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
@@ -183,6 +183,12 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
 
     if (Config::JIT_FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
     {
+        if (rdMapped.IsImm())
+        {
+            MOV(32, R(RSCRATCH4), rdMapped);
+            rdMapped = R(RSCRATCH4);
+        }
+
         u8* memopStart = GetWritableCodePtr();
         LoadStorePatch patch;