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* implement the last missing instructions. QADD is not good according to ARMWrestler, but it doesn't make sense. TODO: investigate.

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* buttons A and B
* silence 'unknown IO write' for 3D GPU ports
This commit is contained in:
StapleButter
2017-01-31 18:41:31 +01:00
parent 516bc30ee3
commit 9541d17c7c
7 changed files with 220 additions and 22 deletions
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24
ARM_InstrTable.h
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@ -118,9 +118,9 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0001 0000 0000
A_MRS, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_SWP, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
A_UNK, A_QADD, A_UNK, A_UNK,
A_SMLAxy, A_SWP, A_SMLAxy, A_STRH_REG,
A_SMLAxy, A_LDRD_REG, A_SMLAxy, A_STRD_REG,
// 0001 0001 0000
A_TST_REG_LSL_IMM, A_TST_REG_LSL_REG, A_TST_REG_LSR_IMM, A_TST_REG_LSR_REG,
@ -130,9 +130,9 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0001 0010 0000
A_MSR_REG, A_BX, A_UNK, A_BLX_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_REG,
A_UNK, A_LDRD_REG, A_UNK, A_STRD_REG,
A_UNK, A_QSUB, A_UNK, A_UNK,
A_SMLAWy, A_UNK, A_SMULWy, A_STRH_REG,
A_SMLAWy, A_LDRD_REG, A_SMULWy, A_STRD_REG,
// 0001 0011 0000
A_TEQ_REG_LSL_IMM, A_TEQ_REG_LSL_REG, A_TEQ_REG_LSR_IMM, A_TEQ_REG_LSR_REG,
@ -142,9 +142,9 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0001 0100 0000
A_MRS, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_SWPB, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
A_UNK, A_QDADD, A_UNK, A_UNK,
A_SMLALxy, A_SWPB, A_SMLALxy, A_STRH_IMM,
A_SMLALxy, A_LDRD_IMM, A_SMLALxy, A_STRD_IMM,
// 0001 0101 0000
A_CMP_REG_LSL_IMM, A_CMP_REG_LSL_REG, A_CMP_REG_LSR_IMM, A_CMP_REG_LSR_REG,
@ -154,9 +154,9 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
// 0001 0110 0000
A_MSR_REG, A_CLZ, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_STRH_IMM,
A_UNK, A_LDRD_IMM, A_UNK, A_STRD_IMM,
A_UNK, A_QDSUB, A_UNK, A_UNK,
A_SMULxy, A_UNK, A_SMULxy, A_STRH_IMM,
A_SMULxy, A_LDRD_IMM, A_SMULxy, A_STRD_IMM,
// 0001 0111 0000
A_CMN_REG_LSL_IMM, A_CMN_REG_LSL_REG, A_CMN_REG_LSR_IMM, A_CMN_REG_LSR_REG,