piwalker/melonDS
1
0
Fork 0
mirror of https://github.com/melonDS-emu/melonDS.git synced 2025-07-22 22:01:06 -06:00
Code Issues Packages Projects Releases Wiki Activity

more shit! some start of ALU emulation

Browse Source
This commit is contained in:
StapleButter
2016-11-25 00:08:53 +01:00
parent f74fb2dd27
commit 97ec988dae
9 changed files with 733 additions and 80 deletions
Download Patch File Download Diff File Expand all files Collapse all files

144
ARM_InstrTable.h
View File

@ -106,8 +106,8 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 0001 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_TST_REG_LSL_IMM, A_TST_REG_LSL_REG, A_TST_REG_LSR_IMM, A_TST_REG_LSR_REG,
A_TST_REG_ASR_IMM, A_TST_REG_ASR_REG, A_TST_REG_ROR_IMM, A_TST_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
@ -118,8 +118,8 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 0011 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_TEQ_REG_LSL_IMM, A_TEQ_REG_LSL_REG, A_TEQ_REG_LSR_IMM, A_TEQ_REG_LSR_REG,
A_TEQ_REG_ASR_IMM, A_TEQ_REG_ASR_REG, A_TEQ_REG_ROR_IMM, A_TEQ_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
@ -130,8 +130,8 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 0101 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_CMP_REG_LSL_IMM, A_CMP_REG_LSL_REG, A_CMP_REG_LSR_IMM, A_CMP_REG_LSR_REG,
A_CMP_REG_ASR_IMM, A_CMP_REG_ASR_REG, A_CMP_REG_ROR_IMM, A_CMP_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
@ -142,56 +142,56 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 0111 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_CMN_REG_LSL_IMM, A_CMN_REG_LSL_REG, A_CMN_REG_LSR_IMM, A_CMN_REG_LSR_REG,
A_CMN_REG_ASR_IMM, A_CMN_REG_ASR_REG, A_CMN_REG_ROR_IMM, A_CMN_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1000 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_ORR_REG_LSL_IMM, A_ORR_REG_LSL_REG, A_ORR_REG_LSR_IMM, A_ORR_REG_LSR_REG,
A_ORR_REG_ASR_IMM, A_ORR_REG_ASR_REG, A_ORR_REG_ROR_IMM, A_ORR_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1001 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_ORR_REG_LSL_IMM_S, A_ORR_REG_LSL_REG_S, A_ORR_REG_LSR_IMM_S, A_ORR_REG_LSR_REG_S,
A_ORR_REG_ASR_IMM_S, A_ORR_REG_ASR_REG_S, A_ORR_REG_ROR_IMM_S, A_ORR_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1010 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MOV_REG_LSL_IMM, A_MOV_REG_LSL_REG, A_MOV_REG_LSR_IMM, A_MOV_REG_LSR_REG,
A_MOV_REG_ASR_IMM, A_MOV_REG_ASR_REG, A_MOV_REG_ROR_IMM, A_MOV_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1011 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MOV_REG_LSL_IMM_S, A_MOV_REG_LSL_REG_S, A_MOV_REG_LSR_IMM_S, A_MOV_REG_LSR_REG_S,
A_MOV_REG_ASR_IMM_S, A_MOV_REG_ASR_REG_S, A_MOV_REG_ROR_IMM_S, A_MOV_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1100 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_BIC_REG_LSL_IMM, A_BIC_REG_LSL_REG, A_BIC_REG_LSR_IMM, A_BIC_REG_LSR_REG,
A_BIC_REG_ASR_IMM, A_BIC_REG_ASR_REG, A_BIC_REG_ROR_IMM, A_BIC_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1101 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_BIC_REG_LSL_IMM_S, A_BIC_REG_LSL_REG_S, A_BIC_REG_LSR_IMM_S, A_BIC_REG_LSR_REG_S,
A_BIC_REG_ASR_IMM_S, A_BIC_REG_ASR_REG_S, A_BIC_REG_ROR_IMM_S, A_BIC_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1110 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MVN_REG_LSL_IMM, A_MVN_REG_LSL_REG, A_MVN_REG_LSR_IMM, A_MVN_REG_LSR_REG,
A_MVN_REG_ASR_IMM, A_MVN_REG_ASR_REG, A_MVN_REG_ROR_IMM, A_MVN_REG_ROR_REG,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
// 0001 1111 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MVN_REG_LSL_IMM_S, A_MVN_REG_LSL_REG_S, A_MVN_REG_LSR_IMM_S, A_MVN_REG_LSR_REG_S,
A_MVN_REG_ASR_IMM_S, A_MVN_REG_ASR_REG_S, A_MVN_REG_ROR_IMM_S, A_MVN_REG_ROR_REG_S,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
@ -302,10 +302,10 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0011 0001 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_TST_IMM, A_TST_IMM, A_TST_IMM, A_TST_IMM,
A_TST_IMM, A_TST_IMM, A_TST_IMM, A_TST_IMM,
A_TST_IMM, A_TST_IMM, A_TST_IMM, A_TST_IMM,
A_TST_IMM, A_TST_IMM, A_TST_IMM, A_TST_IMM,
// 0011 0010 0000
A_UNK, A_UNK, A_UNK, A_UNK,
@ -314,10 +314,10 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0011 0011 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM,
A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM,
A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM,
A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM, A_TEQ_IMM,
// 0011 0100 0000
A_UNK, A_UNK, A_UNK, A_UNK,
@ -326,10 +326,10 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0011 0101 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_CMP_IMM, A_CMP_IMM, A_CMP_IMM, A_CMP_IMM,
A_CMP_IMM, A_CMP_IMM, A_CMP_IMM, A_CMP_IMM,
A_CMP_IMM, A_CMP_IMM, A_CMP_IMM, A_CMP_IMM,
A_CMP_IMM, A_CMP_IMM, A_CMP_IMM, A_CMP_IMM,
// 0011 0110 0000
A_UNK, A_UNK, A_UNK, A_UNK,
@ -338,58 +338,58 @@ INSTRFUNC_PROTO(ARMInstrTable[4096]) =
A_UNK, A_UNK, A_UNK, A_UNK,
// 0011 0111 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_CMN_IMM, A_CMN_IMM, A_CMN_IMM, A_CMN_IMM,
A_CMN_IMM, A_CMN_IMM, A_CMN_IMM, A_CMN_IMM,
A_CMN_IMM, A_CMN_IMM, A_CMN_IMM, A_CMN_IMM,
A_CMN_IMM, A_CMN_IMM, A_CMN_IMM, A_CMN_IMM,
// 0011 1000 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_ORR_IMM, A_ORR_IMM, A_ORR_IMM, A_ORR_IMM,
A_ORR_IMM, A_ORR_IMM, A_ORR_IMM, A_ORR_IMM,
A_ORR_IMM, A_ORR_IMM, A_ORR_IMM, A_ORR_IMM,
A_ORR_IMM, A_ORR_IMM, A_ORR_IMM, A_ORR_IMM,
// 0011 1001 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S,
A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S,
A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S,
A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S, A_ORR_IMM_S,
// 0011 1010 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MOV_IMM, A_MOV_IMM, A_MOV_IMM, A_MOV_IMM,
A_MOV_IMM, A_MOV_IMM, A_MOV_IMM, A_MOV_IMM,
A_MOV_IMM, A_MOV_IMM, A_MOV_IMM, A_MOV_IMM,
A_MOV_IMM, A_MOV_IMM, A_MOV_IMM, A_MOV_IMM,
// 0011 1011 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S,
A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S,
A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S,
A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S, A_MOV_IMM_S,
// 0011 1100 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_BIC_IMM, A_BIC_IMM, A_BIC_IMM, A_BIC_IMM,
A_BIC_IMM, A_BIC_IMM, A_BIC_IMM, A_BIC_IMM,
A_BIC_IMM, A_BIC_IMM, A_BIC_IMM, A_BIC_IMM,
A_BIC_IMM, A_BIC_IMM, A_BIC_IMM, A_BIC_IMM,
// 0011 1101 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S,
A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S,
A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S,
A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S, A_BIC_IMM_S,
// 0011 1110 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MVN_IMM, A_MVN_IMM, A_MVN_IMM, A_MVN_IMM,
A_MVN_IMM, A_MVN_IMM, A_MVN_IMM, A_MVN_IMM,
A_MVN_IMM, A_MVN_IMM, A_MVN_IMM, A_MVN_IMM,
A_MVN_IMM, A_MVN_IMM, A_MVN_IMM, A_MVN_IMM,
// 0011 1111 0000
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_UNK, A_UNK, A_UNK, A_UNK,
A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S,
A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S,
A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S,
A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S, A_MVN_IMM_S,