mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2024-11-14 13:27:41 -07:00
DMA support!
This commit is contained in:
parent
b10a0d64a2
commit
9808b73c6f
34
ARM.cpp
34
ARM.cpp
@ -291,43 +291,15 @@ s32 ARM::Execute(s32 cycles)
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}
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}
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// zorp
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// TODO optimize this shit!!!
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if (NDS::HaltInterrupted(Num))
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{
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if (NDS::IME[Num]&1)
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TriggerIRQ();
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}
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//if (R[15]==0x2DD0)
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// printf("-> %08X %08X\n", R[13], Read32(0x0380FF7C));
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//if (R[15]==0x37FEC7A)
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// printf("!!!!!!!! %08X %08X\n", R[14], CPSR);
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//if (R[15] == 0x037FF102+4 && CPSR&0x20) printf("!!!!! %08X -> %08X, %08X -> %08X, %08X, %08X/%08X\n",
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// addr, R[15], cpsr, CPSR, CurInstr, R_SVC[2], R_IRQ[2]);
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if (addr >= 0x37FAD68 && addr < 0x37FAE40)
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{
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if (addr==0x037FAE2A) debug=2;
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//printf("!!! @ %08X %08X / %08X %08X/%08X\n", addr, R[15], Read32(0x03FFFFFC), Read32(0x04000210), Read32(0x04000214));
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}
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else if (debug==2)// && (CPSR&0x1F)==0x12)
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{
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//printf("[%08X|%08X] IRQ RET VAL = %08X | %d\n", R[15], CPSR, Read32(0x0380FF7C), cyclesrun);
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}
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/*if (R[15] == 0x03802D54+2)
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printf("%08X -> %08X\n", addr, R[15]);
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// 37FE284(ARM) -> 37FE256 -> 37FECA0 !!!
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if (R[15] == 0x037FE256+4)
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printf("ROYAL %08X %s -> %08X %s | %08X\n",
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addr, (cpsr&0x20)?"THUMB":"ARM", R[15], (CPSR&0x20)?"THUMB":"ARM",
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R[0]);
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if (R[15] == 0x37FE27C)
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printf("NOTROYAL %08X %08X %08X/%08X\n", R[0], Read32(0x0380593C + 0x3C), R_SVC[2], Read32(0x0380593C-4));*/
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// R0 = 0380593C
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//if (R[15] >= 0x3800170+4 && R[15]<=0x0380017A+4)
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// printf("!! %08X: %08X | %08X %08X\n", R[15]-4, R[13], R[0], R[1]);
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addr = R[15] - (CPSR&0x20 ? 4:8);
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cpsr = CPSR;
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144
DMA.cpp
Normal file
144
DMA.cpp
Normal file
@ -0,0 +1,144 @@
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/*
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Copyright 2016-2017 StapleButter
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This file is part of melonDS.
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melonDS is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option)
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any later version.
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melonDS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdio.h>
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#include "NDS.h"
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#include "DMA.h"
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// NOTES ON DMA SHIT
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//
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// * could use optimized code paths for common types of DMA transfers. for example, VRAM
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// * needs to eventually be made more accurate anyway. DMA isn't instant.
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DMA::DMA(u32 cpu, u32 num)
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{
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CPU = cpu;
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Num = num;
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Reset();
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}
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DMA::~DMA()
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{
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}
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void DMA::Reset()
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{
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SrcAddr = 0;
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DstAddr = 0;
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Cnt = 0;
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StartMode = 0;
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CurSrcAddr = 0;
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CurDstAddr = 0;
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RemCount = 0;
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SrcAddrInc = 0;
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DstAddrInc = 0;
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}
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void DMA::WriteCnt(u32 val)
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{
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u32 oldcnt = Cnt;
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Cnt = val;
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if ((!(oldcnt & 0x80000000)) && (val & 0x80000000))
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{
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CurSrcAddr = SrcAddr;
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CurDstAddr = DstAddr;
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switch (Cnt & 0x00060000)
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{
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case 0x00000000: DstAddrInc = 1; break;
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case 0x00020000: DstAddrInc = -1; break;
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case 0x00040000: DstAddrInc = 0; break;
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case 0x00060000: DstAddrInc = 1; break;
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}
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switch (Cnt & 0x00180000)
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{
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case 0x00000000: SrcAddrInc = 1; break;
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case 0x00080000: SrcAddrInc = -1; break;
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case 0x00100000: SrcAddrInc = 0; break;
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case 0x00180000: SrcAddrInc = 1; printf("BAD DMA SRC INC MODE 3\n"); break;
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}
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if (CPU == 0)
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StartMode = (Cnt >> 27) & 0x7;
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else
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StartMode = ((Cnt >> 28) & 0x3) | 0x8;
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if ((StartMode & 0x7) == 0)
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Start();
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}
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}
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void DMA::Start()
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{
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u32 countmask;
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if (CPU == 0)
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countmask = 0x001FFFFF;
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else
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countmask = (Num==3 ? 0x0000FFFF : 0x00003FFF);
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RemCount = Cnt & countmask;
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if (!RemCount)
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RemCount = countmask+1;
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if ((Cnt & 0x00060000) == 0x00060000)
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CurDstAddr = DstAddr;
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printf("ARM%d DMA%d %08X->%08X %d units %dbit\n", CPU?7:9, Num, CurSrcAddr, CurDstAddr, RemCount, (Cnt & 0x04000000)?16:32);
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// TODO: NOT MAKE THE DMA INSTANT!!
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if (Cnt & 0x04000000)
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{
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u16 (*readfn)(u32) = CPU ? NDS::ARM7Read16 : NDS::ARM9Read16;
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void (*writefn)(u32,u16) = CPU ? NDS::ARM7Write16 : NDS::ARM9Write16;
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while (RemCount > 0)
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{
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writefn(CurDstAddr, readfn(CurSrcAddr));
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CurSrcAddr += SrcAddrInc<<1;
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CurDstAddr += DstAddrInc<<1;
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RemCount--;
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}
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}
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else
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{
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u32 (*readfn)(u32) = CPU ? NDS::ARM7Read32 : NDS::ARM9Read32;
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void (*writefn)(u32,u32) = CPU ? NDS::ARM7Write32 : NDS::ARM9Write32;
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while (RemCount > 0)
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{
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writefn(CurDstAddr, readfn(CurSrcAddr));
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CurSrcAddr += SrcAddrInc<<2;
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CurDstAddr += DstAddrInc<<2;
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RemCount--;
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}
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}
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if (!(Cnt & 0x02000000))
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Cnt &= ~0x80000000;
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if (Cnt & 0x40000000)
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NDS::TriggerIRQ(CPU, NDS::IRQ_DMA0 + Num);
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}
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56
DMA.h
Normal file
56
DMA.h
Normal file
@ -0,0 +1,56 @@
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/*
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Copyright 2016-2017 StapleButter
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This file is part of melonDS.
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melonDS is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option)
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any later version.
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melonDS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#ifndef DMA_H
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#define DMA_H
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#include "types.h"
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class DMA
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{
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public:
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DMA(u32 cpu, u32 num);
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~DMA();
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void Reset();
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void WriteCnt(u32 val);
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void Start();
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void StartIfNeeded(u32 mode)
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{
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if ((mode == StartMode) && (Cnt & 0x80000000))
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Start();
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}
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u32 SrcAddr;
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u32 DstAddr;
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u32 Cnt;
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private:
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u32 CPU, Num;
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u32 StartMode;
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u32 CurSrcAddr;
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u32 CurDstAddr;
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u32 RemCount;
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u32 SrcAddrInc;
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u32 DstAddrInc;
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};
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#endif
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90
NDS.cpp
90
NDS.cpp
@ -21,6 +21,7 @@
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#include "NDS.h"
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#include "ARM.h"
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#include "CP15.h"
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#include "DMA.h"
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#include "FIFO.h"
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#include "GPU2D.h"
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#include "SPI.h"
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@ -79,6 +80,9 @@ u16 PowerControl7;
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Timer Timers[8];
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DMA* DMAs[8];
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u32 DMA9Fill[4];
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u16 IPCSync9, IPCSync7;
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u16 IPCFIFOCnt9, IPCFIFOCnt7;
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FIFO* IPCFIFO9; // FIFO in which the ARM9 writes
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@ -102,6 +106,15 @@ void Init()
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ARM9 = new ARM(0);
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ARM7 = new ARM(1);
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DMAs[0] = new DMA(0, 0);
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DMAs[1] = new DMA(0, 1);
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DMAs[2] = new DMA(0, 2);
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DMAs[3] = new DMA(0, 3);
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DMAs[4] = new DMA(1, 0);
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DMAs[5] = new DMA(1, 1);
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DMAs[6] = new DMA(1, 2);
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DMAs[7] = new DMA(1, 3);
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IPCFIFO9 = new FIFO(16);
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IPCFIFO7 = new FIFO(16);
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@ -156,6 +169,7 @@ void LoadROM()
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void Reset()
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{
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FILE* f;
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u32 i;
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f = fopen("bios9.bin", "rb");
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if (!f)
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@ -216,6 +230,9 @@ void Reset()
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memset(Timers, 0, 8*sizeof(Timer));
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for (i = 0; i < 8; i++) DMAs[i]->Reset();
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memset(DMA9Fill, 0, 4*4);
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GPU2D::Reset();
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SPI::Reset();
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Wifi::Reset();
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@ -991,7 +1008,7 @@ u8 ARM7Read8(u32 addr)
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return 0;
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}
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printf("unknown arm7 read8 %08X\n", addr);
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printf("unknown arm7 read8 %08X %08X %08X/%08X\n", addr, ARM7->R[15], ARM7->R[0], ARM7->R[1]);
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return 0;
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}
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@ -1229,6 +1246,15 @@ u16 ARM9IORead16(u32 addr)
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case 0x04000004: return GPU2D::DispStat[0];
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case 0x04000006: return GPU2D::VCount;
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case 0x040000E0: return ((u16*)DMA9Fill)[0];
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case 0x040000E2: return ((u16*)DMA9Fill)[1];
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case 0x040000E4: return ((u16*)DMA9Fill)[2];
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case 0x040000E6: return ((u16*)DMA9Fill)[3];
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case 0x040000E8: return ((u16*)DMA9Fill)[4];
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case 0x040000EA: return ((u16*)DMA9Fill)[5];
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case 0x040000EC: return ((u16*)DMA9Fill)[6];
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case 0x040000EE: return ((u16*)DMA9Fill)[7];
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case 0x04000100: return Timers[0].Counter;
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case 0x04000102: return Timers[0].Control;
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case 0x04000104: return Timers[1].Counter;
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@ -1268,6 +1294,24 @@ u32 ARM9IORead32(u32 addr)
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{
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case 0x04000004: return GPU2D::DispStat[0] | (GPU2D::VCount << 16);
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case 0x040000B0: return DMAs[0]->SrcAddr;
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case 0x040000B4: return DMAs[0]->DstAddr;
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case 0x040000B8: return DMAs[0]->Cnt;
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case 0x040000BC: return DMAs[1]->SrcAddr;
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case 0x040000C0: return DMAs[1]->DstAddr;
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case 0x040000C4: return DMAs[1]->Cnt;
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case 0x040000C8: return DMAs[2]->SrcAddr;
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case 0x040000CC: return DMAs[2]->DstAddr;
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case 0x040000D0: return DMAs[2]->Cnt;
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case 0x040000D4: return DMAs[3]->SrcAddr;
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case 0x040000D8: return DMAs[3]->DstAddr;
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case 0x040000DC: return DMAs[3]->Cnt;
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case 0x040000E0: return DMA9Fill[0];
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case 0x040000E4: return DMA9Fill[1];
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case 0x040000E8: return DMA9Fill[2];
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case 0x040000EC: return DMA9Fill[3];
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case 0x04000100: return Timers[0].Counter | (Timers[0].Control << 16);
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case 0x04000104: return Timers[1].Counter | (Timers[1].Control << 16);
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case 0x04000108: return Timers[2].Counter | (Timers[2].Control << 16);
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@ -1409,6 +1453,24 @@ void ARM9IOWrite32(u32 addr, u32 val)
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{
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switch (addr)
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{
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case 0x040000B0: DMAs[0]->SrcAddr = val; return;
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case 0x040000B4: DMAs[0]->DstAddr = val; return;
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case 0x040000B8: DMAs[0]->WriteCnt(val); return;
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case 0x040000BC: DMAs[1]->SrcAddr = val; return;
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case 0x040000C0: DMAs[1]->DstAddr = val; return;
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case 0x040000C4: DMAs[1]->WriteCnt(val); return;
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case 0x040000C8: DMAs[2]->SrcAddr = val; return;
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case 0x040000CC: DMAs[2]->DstAddr = val; return;
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case 0x040000D0: DMAs[2]->WriteCnt(val); return;
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case 0x040000D4: DMAs[3]->SrcAddr = val; return;
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case 0x040000D8: DMAs[3]->DstAddr = val; return;
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case 0x040000DC: DMAs[3]->WriteCnt(val); return;
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case 0x040000E0: DMA9Fill[0] = val; return;
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case 0x040000E4: DMA9Fill[1] = val; return;
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case 0x040000E8: DMA9Fill[2] = val; return;
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case 0x040000EC: DMA9Fill[3] = val; return;
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case 0x04000100:
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Timers[0].Reload = val & 0xFFFF;
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TimerStart(0, val>>16);
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@ -1561,6 +1623,19 @@ u32 ARM7IORead32(u32 addr)
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{
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case 0x04000004: return GPU2D::DispStat[1] | (GPU2D::VCount << 16);
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case 0x040000B0: return DMAs[4]->SrcAddr;
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case 0x040000B4: return DMAs[4]->DstAddr;
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case 0x040000B8: return DMAs[4]->Cnt;
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case 0x040000BC: return DMAs[5]->SrcAddr;
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case 0x040000C0: return DMAs[5]->DstAddr;
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case 0x040000C4: return DMAs[5]->Cnt;
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case 0x040000C8: return DMAs[6]->SrcAddr;
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case 0x040000CC: return DMAs[6]->DstAddr;
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case 0x040000D0: return DMAs[6]->Cnt;
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case 0x040000D4: return DMAs[7]->SrcAddr;
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case 0x040000D8: return DMAs[7]->DstAddr;
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case 0x040000DC: return DMAs[7]->Cnt;
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case 0x04000100: return Timers[4].Counter | (Timers[4].Control << 16);
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case 0x04000104: return Timers[5].Counter | (Timers[5].Control << 16);
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case 0x04000108: return Timers[6].Counter | (Timers[6].Control << 16);
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@ -1713,6 +1788,19 @@ void ARM7IOWrite32(u32 addr, u32 val)
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{
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switch (addr)
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{
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case 0x040000B0: DMAs[4]->SrcAddr = val; return;
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case 0x040000B4: DMAs[4]->DstAddr = val; return;
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case 0x040000B8: DMAs[4]->WriteCnt(val); return;
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case 0x040000BC: DMAs[5]->SrcAddr = val; return;
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case 0x040000C0: DMAs[5]->DstAddr = val; return;
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case 0x040000C4: DMAs[5]->WriteCnt(val); return;
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case 0x040000C8: DMAs[6]->SrcAddr = val; return;
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case 0x040000CC: DMAs[6]->DstAddr = val; return;
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case 0x040000D0: DMAs[6]->WriteCnt(val); return;
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case 0x040000D4: DMAs[7]->SrcAddr = val; return;
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case 0x040000D8: DMAs[7]->DstAddr = val; return;
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case 0x040000DC: DMAs[7]->WriteCnt(val); return;
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case 0x04000100:
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Timers[4].Reload = val & 0xFFFF;
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TimerStart(4, val>>16);
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|
18
main.cpp
18
main.cpp
@ -128,6 +128,9 @@ int main()
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NDS::Init();
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u32 nframes = 0;
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u32 lasttick = GetTickCount();
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for (;;)
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{
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MSG msg;
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@ -149,6 +152,21 @@ int main()
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HDC dc = GetDC(melon);
|
||||
SetDIBitsToDevice(dc, 0, 0, 256, 384, 0, 0, 0, 384, GPU2D::Framebuffer, (BITMAPINFO*)&bmp, DIB_RGB_COLORS);
|
||||
UpdateWindow(melon);
|
||||
|
||||
nframes++;
|
||||
if (nframes >= 30)
|
||||
{
|
||||
u32 tick = GetTickCount();
|
||||
u32 diff = tick - lasttick;
|
||||
lasttick = tick;
|
||||
|
||||
u32 fps = (nframes * 1000) / diff;
|
||||
nframes = 0;
|
||||
|
||||
char melontitle[100];
|
||||
sprintf(melontitle, "melonDS | %d FPS", fps);
|
||||
SetWindowText(melon, melontitle);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -48,6 +48,8 @@
|
||||
<Unit filename="ARM_InstrTable.h" />
|
||||
<Unit filename="CP15.cpp" />
|
||||
<Unit filename="CP15.h" />
|
||||
<Unit filename="DMA.cpp" />
|
||||
<Unit filename="DMA.h" />
|
||||
<Unit filename="FIFO.cpp" />
|
||||
<Unit filename="FIFO.h" />
|
||||
<Unit filename="GPU2D.cpp" />
|
||||
|
@ -1,5 +1,5 @@
|
||||
# depslib dependency file v1.0
|
||||
1481167563 source:c:\documents\sources\melonds\main.cpp
|
||||
1484695094 source:c:\documents\sources\melonds\main.cpp
|
||||
<stdio.h>
|
||||
<windows.h>
|
||||
"NDS.h"
|
||||
@ -10,18 +10,19 @@
|
||||
|
||||
1481161027 c:\documents\sources\melonds\types.h
|
||||
|
||||
1484616465 source:c:\documents\sources\melonds\nds.cpp
|
||||
1484699425 source:c:\documents\sources\melonds\nds.cpp
|
||||
<stdio.h>
|
||||
<string.h>
|
||||
"NDS.h"
|
||||
"ARM.h"
|
||||
"CP15.h"
|
||||
"DMA.h"
|
||||
"FIFO.h"
|
||||
"GPU2D.h"
|
||||
"SPI.h"
|
||||
"Wifi.h"
|
||||
|
||||
1484538131 source:c:\documents\sources\melonds\arm.cpp
|
||||
1484693558 source:c:\documents\sources\melonds\arm.cpp
|
||||
<stdio.h>
|
||||
"NDS.h"
|
||||
"ARM.h"
|
||||
@ -102,3 +103,11 @@
|
||||
1484612398 c:\documents\sources\melonds\fifo.h
|
||||
"types.h"
|
||||
|
||||
1484699433 source:c:\documents\sources\melonds\dma.cpp
|
||||
<stdio.h>
|
||||
"NDS.h"
|
||||
"DMA.h"
|
||||
|
||||
1484698068 c:\documents\sources\melonds\dma.h
|
||||
"types.h"
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user