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support allocating more registers for aarch64 JIT

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also some minor fixes for the x64 JIT as well
This commit is contained in:
RSDuck
2021-06-29 22:25:43 +02:00
parent dd53b01f76
commit aa430608e7
10 changed files with 112 additions and 64 deletions
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7
src/ARM_InstrInfo.cpp
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@ -526,7 +526,7 @@ Info Decode(bool thumb, u32 num, u32 instr)
if (data & A_LoadMem)
{
if (res.SrcRegs == (1 << 15))
res.SpecialKind = special_LoadLiteral;
res.SpecialKind = special_LoadLiteral;
else
res.SpecialKind = special_LoadMem;
}
@ -536,6 +536,11 @@ Info Decode(bool thumb, u32 num, u32 instr)
u16 set = (instr & 0xFFFF);
res.NotStrictlyNeeded |= set & ~(res.SrcRegs|res.DstRegs|(1<<15));
res.DstRegs |= set;
// when the instruction is executed not in usermode a banked register in memory will be written to
// but the unbanked register will still be allocated, so it is expected to carry the proper value
// thus it is a source register
if (instr & (1<<22))
res.SrcRegs |= set & 0x7F00;
}
if (res.Kind == ak_STM)
{