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https://github.com/melonDS-emu/melonDS.git
synced 2024-11-14 13:27:41 -07:00
it all makes sense now...
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parent
b90d5c2320
commit
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67
src/ARM.cpp
67
src/ARM.cpp
@ -286,47 +286,6 @@ void ARM::SetupCodeMem(u32 addr)
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}
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}
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void ARMv5::BuggedJumpTo32(const u32 addr)
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{
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// ldrd to pc
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// behavior seems to be related to if a bugged 8/16 bit write has prefetch aborted (does any p.abort work?)
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// switching to thumb mode only seems to work the first time an ldrd pc is executed after one of the above aborts?
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// also it can restore cpsr but only if the PU is disabled (?????????????????????????????????????)
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if (BuggyJump == 1)
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{
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BuggyJump = 2;
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if (CP15Control & (1<<15))
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JumpTo(addr & ~0x1, !(CP15Control & 1));
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else
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JumpTo(addr, !(CP15Control & 1));
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}
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else
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{
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JumpTo(addr & ~0x1, !(CP15Control & 1));
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}
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}
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void ARMv5::BuggedJumpTo(const u32 addr)
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{
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// 16 and 8 bit loads (signed instructions included) to pc
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// if they're misaligned they'll prefetch abort
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// but they can only prefetch abort once, every time afterwards will succeed (more testing needed)
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// if the lsb is set they will try to switch to thumb state, though it'll fail if they haven't prefetch aborted yet
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if ((BuggyJump == 0) && (addr & 0x3))
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{
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if (addr & 0x1) CPSR |= 0x20;
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BuggyJump = 1;
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PrefetchAbort();
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return;
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}
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if (CP15Control & (1<<15))
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JumpTo(addr & ~0x1);
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else
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JumpTo(addr);
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}
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void ARMv5::JumpTo(u32 addr, bool restorecpsr)
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{
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if (restorecpsr)
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@ -395,14 +354,25 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
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NDS.MonitorARM9Jump(addr);
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}
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void ARMv4::BuggedJumpTo32(const u32 addr)
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void ARMv5::JumpTo8_16Bit(const u32 addr)
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{
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JumpTo(addr & ~1); // todo
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// 8 and 16 loads (signed included) to pc
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if (!(CP15Control & 0x1))
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{
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// if the pu is disabled it behaves like a normal jump
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JumpTo((CP15Control & (1<<15)) ? (addr & ~0x1) : addr);
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}
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void ARMv4::BuggedJumpTo(const u32 addr)
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else
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{
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JumpTo(addr & ~1); // todo
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if (addr & 0x3)
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{
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// if the pu is enabled it will always prefetch abort if not word aligned
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// although it will still attempt (and fail) to enter thumb mode if enabled
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if ((addr & 0x1) && !(CP15Control & (1<<15))) CPSR |= 0x20;
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PrefetchAbort();
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}
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else JumpTo(addr);
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}
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}
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void ARMv4::JumpTo(u32 addr, bool restorecpsr)
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@ -449,6 +419,11 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
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}
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}
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void ARMv4::JumpTo8_16Bit(const u32 addr)
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{
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JumpTo(addr & ~1); // checkme?
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}
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void ARM::RestoreCPSR()
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{
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u32 oldcpsr = CPSR;
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@ -65,9 +65,8 @@ public:
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virtual void FillPipeline() = 0;
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virtual void BuggedJumpTo32(const u32 addr) = 0;
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virtual void BuggedJumpTo(const u32 addr) = 0;
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virtual void JumpTo(u32 addr, bool restorecpsr = false) = 0;
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virtual void JumpTo8_16Bit(u32 addr) = 0;
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void RestoreCPSR();
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void Halt(u32 halt)
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@ -239,9 +238,8 @@ public:
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void FillPipeline() override;
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void BuggedJumpTo32(const u32 addr) override;
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void BuggedJumpTo(const u32 addr) override;
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void JumpTo(u32 addr, bool restorecpsr = false) override;
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void JumpTo8_16Bit(const u32 addr) override;
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void PrefetchAbort();
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void DataAbort();
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@ -386,9 +384,8 @@ public:
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void FillPipeline() override;
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void BuggedJumpTo32(const u32 addr) override;
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void BuggedJumpTo(const u32 addr) override;
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void JumpTo(u32 addr, bool restorecpsr = false) override;
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void JumpTo8_16Bit(const u32 addr) override;
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void Execute() override;
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#ifdef JIT_ENABLED
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@ -141,7 +141,7 @@ namespace melonDS::ARMInterpreter
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val;
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// TODO: user mode
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@ -151,7 +151,7 @@ namespace melonDS::ARMInterpreter
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val;
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@ -262,7 +262,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } /* checkme */ \
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if (!cpu->DataRead32 (offset , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(offset+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->BuggedJumpTo32(val); \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -274,7 +274,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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if (r&1) { A_UNK(cpu); return; } /* checkme */ \
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if (!cpu->DataRead32 (addr , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
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u32 val; if (!cpu->DataRead32S(addr+4, &val)) {cpu->AddCycles_CDI(); return;} \
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if (r == 14) cpu->BuggedJumpTo32(val); \
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if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
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else cpu->R[r+1] = val; \
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cpu->AddCycles_CDI(); \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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@ -308,7 +308,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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u32 val; bool dataabort = !cpu->DataRead16(offset, &val); \
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -317,7 +317,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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u32 val; bool dataabort = !cpu->DataRead16(addr, &val); \
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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@ -327,7 +327,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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val = (s32)(s8)val; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -337,7 +337,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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val = (s32)(s8)val; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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@ -347,7 +347,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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val = (s32)(s16)val; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
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@ -357,7 +357,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
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cpu->AddCycles_CDI(); \
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if (dataabort) return; \
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val = (s32)(s16)val; \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
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if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
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else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
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cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
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