it all makes sense now...

This commit is contained in:
Jaklyy 2024-06-09 19:10:43 -04:00
parent b90d5c2320
commit ae0824fdd3
3 changed files with 36 additions and 64 deletions

View File

@ -286,47 +286,6 @@ void ARM::SetupCodeMem(u32 addr)
}
}
void ARMv5::BuggedJumpTo32(const u32 addr)
{
// ldrd to pc
// behavior seems to be related to if a bugged 8/16 bit write has prefetch aborted (does any p.abort work?)
// switching to thumb mode only seems to work the first time an ldrd pc is executed after one of the above aborts?
// also it can restore cpsr but only if the PU is disabled (?????????????????????????????????????)
if (BuggyJump == 1)
{
BuggyJump = 2;
if (CP15Control & (1<<15))
JumpTo(addr & ~0x1, !(CP15Control & 1));
else
JumpTo(addr, !(CP15Control & 1));
}
else
{
JumpTo(addr & ~0x1, !(CP15Control & 1));
}
}
void ARMv5::BuggedJumpTo(const u32 addr)
{
// 16 and 8 bit loads (signed instructions included) to pc
// if they're misaligned they'll prefetch abort
// but they can only prefetch abort once, every time afterwards will succeed (more testing needed)
// if the lsb is set they will try to switch to thumb state, though it'll fail if they haven't prefetch aborted yet
if ((BuggyJump == 0) && (addr & 0x3))
{
if (addr & 0x1) CPSR |= 0x20;
BuggyJump = 1;
PrefetchAbort();
return;
}
if (CP15Control & (1<<15))
JumpTo(addr & ~0x1);
else
JumpTo(addr);
}
void ARMv5::JumpTo(u32 addr, bool restorecpsr)
{
if (restorecpsr)
@ -395,14 +354,25 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
NDS.MonitorARM9Jump(addr);
}
void ARMv4::BuggedJumpTo32(const u32 addr)
void ARMv5::JumpTo8_16Bit(const u32 addr)
{
JumpTo(addr & ~1); // todo
// 8 and 16 loads (signed included) to pc
if (!(CP15Control & 0x1))
{
// if the pu is disabled it behaves like a normal jump
JumpTo((CP15Control & (1<<15)) ? (addr & ~0x1) : addr);
}
void ARMv4::BuggedJumpTo(const u32 addr)
else
{
JumpTo(addr & ~1); // todo
if (addr & 0x3)
{
// if the pu is enabled it will always prefetch abort if not word aligned
// although it will still attempt (and fail) to enter thumb mode if enabled
if ((addr & 0x1) && !(CP15Control & (1<<15))) CPSR |= 0x20;
PrefetchAbort();
}
else JumpTo(addr);
}
}
void ARMv4::JumpTo(u32 addr, bool restorecpsr)
@ -449,6 +419,11 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
}
}
void ARMv4::JumpTo8_16Bit(const u32 addr)
{
JumpTo(addr & ~1); // checkme?
}
void ARM::RestoreCPSR()
{
u32 oldcpsr = CPSR;

View File

@ -65,9 +65,8 @@ public:
virtual void FillPipeline() = 0;
virtual void BuggedJumpTo32(const u32 addr) = 0;
virtual void BuggedJumpTo(const u32 addr) = 0;
virtual void JumpTo(u32 addr, bool restorecpsr = false) = 0;
virtual void JumpTo8_16Bit(u32 addr) = 0;
void RestoreCPSR();
void Halt(u32 halt)
@ -239,9 +238,8 @@ public:
void FillPipeline() override;
void BuggedJumpTo32(const u32 addr) override;
void BuggedJumpTo(const u32 addr) override;
void JumpTo(u32 addr, bool restorecpsr = false) override;
void JumpTo8_16Bit(const u32 addr) override;
void PrefetchAbort();
void DataAbort();
@ -386,9 +384,8 @@ public:
void FillPipeline() override;
void BuggedJumpTo32(const u32 addr) override;
void BuggedJumpTo(const u32 addr) override;
void JumpTo(u32 addr, bool restorecpsr = false) override;
void JumpTo8_16Bit(const u32 addr) override;
void Execute() override;
#ifdef JIT_ENABLED

View File

@ -141,7 +141,7 @@ namespace melonDS::ARMInterpreter
cpu->AddCycles_CDI(); \
if (dataabort) return; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val;
// TODO: user mode
@ -151,7 +151,7 @@ namespace melonDS::ARMInterpreter
cpu->AddCycles_CDI(); \
if (dataabort) return; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val;
@ -262,7 +262,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
if (r&1) { A_UNK(cpu); return; } /* checkme */ \
if (!cpu->DataRead32 (offset , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
u32 val; if (!cpu->DataRead32S(offset+4, &val)) {cpu->AddCycles_CDI(); return;} \
if (r == 14) cpu->BuggedJumpTo32(val); \
if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
else cpu->R[r+1] = val; \
cpu->AddCycles_CDI(); \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
@ -274,7 +274,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
if (r&1) { A_UNK(cpu); return; } /* checkme */ \
if (!cpu->DataRead32 (addr , &cpu->R[r ])) {cpu->AddCycles_CDI(); return;} \
u32 val; if (!cpu->DataRead32S(addr+4, &val)) {cpu->AddCycles_CDI(); return;} \
if (r == 14) cpu->BuggedJumpTo32(val); \
if (r == 14) cpu->JumpTo(((((ARMv5*)cpu)->CP15Control & (1<<15)) ? (val & ~0x1) : val), true); /* restores cpsr for some reason? */ \
else cpu->R[r+1] = val; \
cpu->AddCycles_CDI(); \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
@ -308,7 +308,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
u32 val; bool dataabort = !cpu->DataRead16(offset, &val); \
cpu->AddCycles_CDI(); \
if (dataabort) return; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
@ -317,7 +317,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
u32 val; bool dataabort = !cpu->DataRead16(addr, &val); \
cpu->AddCycles_CDI(); \
if (dataabort) return; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
@ -327,7 +327,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->AddCycles_CDI(); \
if (dataabort) return; \
val = (s32)(s8)val; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
@ -337,7 +337,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->AddCycles_CDI(); \
if (dataabort) return; \
val = (s32)(s8)val; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;
@ -347,7 +347,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->AddCycles_CDI(); \
if (dataabort) return; \
val = (s32)(s16)val; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset;
@ -357,7 +357,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->AddCycles_CDI(); \
if (dataabort) return; \
val = (s32)(s16)val; \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->BuggedJumpTo(val); \
if (((cpu->CurInstr>>12) & 0xF) == 15) cpu->JumpTo8_16Bit(val); \
else cpu->R[(cpu->CurInstr>>12) & 0xF] = val; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset;