diff --git a/src/ARM.cpp b/src/ARM.cpp
index 6f583430..09ee17db 100644
--- a/src/ARM.cpp
+++ b/src/ARM.cpp
@@ -506,9 +506,9 @@ s32 ARMv5::Execute()
                 AddCycles_C();
         }
 
-        s32 diff = Cycles - lastcycles;
-        NDS::RunTimingCriticalDevices(0, diff >> ClockShift);
-        lastcycles = Cycles - (diff & ClockDiffMask);
+        //s32 diff = Cycles - lastcycles;
+        //NDS::RunTimingCriticalDevices(0, diff >> ClockShift);
+        //lastcycles = Cycles - (diff & ClockDiffMask);
 
         // TODO optimize this shit!!!
         if (Halted)
diff --git a/src/CP15.cpp b/src/CP15.cpp
index 0d1be766..a23629a0 100644
--- a/src/CP15.cpp
+++ b/src/CP15.cpp
@@ -24,6 +24,9 @@
 
 // access timing for cached regions
 // this would be an average between cache hits and cache misses
+// this was measured to be close to hardware average
+// a value of 1 would represent a perfect cache, but that causes
+// games to run too fast, causing a number of issues
 const int kDataCacheTiming = 2;
 const int kCodeCacheTiming = 1;
 
diff --git a/src/DMA.cpp b/src/DMA.cpp
index 90eb9109..9edbf4b2 100644
--- a/src/DMA.cpp
+++ b/src/DMA.cpp
@@ -246,8 +246,6 @@ s32 DMA::Run(s32 cycles)
             writefn(CurDstAddr, readfn(CurSrcAddr));
 
             cycles -= unitcycles;
-            NDS::RunTimingCriticalDevices(CPU, unitcycles);
-
             CurSrcAddr += SrcAddrInc<<1;
             CurDstAddr += DstAddrInc<<1;
             IterCount--;
@@ -310,8 +308,6 @@ s32 DMA::Run(s32 cycles)
             writefn(CurDstAddr, readfn(CurSrcAddr));
 
             cycles -= unitcycles;
-            NDS::RunTimingCriticalDevices(CPU, unitcycles);
-
             CurSrcAddr += SrcAddrInc<<2;
             CurDstAddr += DstAddrInc<<2;
             IterCount--;
diff --git a/src/NDS.cpp b/src/NDS.cpp
index 12cd8a58..28d459da 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -804,14 +804,18 @@ u32 RunFrame()
                 ndscyclestorun = ARM9->Cycles >> 1;
             }
 
+            RunTimingCriticalDevices(0, ndscyclestorun);
+
             if (CPUStop & 0x0FFF0000)
             {
                 s32 cycles = ndscyclestorun - ARM7Offset;
+                s32 critcycles = cycles;
                 cycles = DMAs[4]->Run(cycles);
                 if (cycles > 0) cycles = DMAs[5]->Run(cycles);
                 if (cycles > 0) cycles = DMAs[6]->Run(cycles);
                 if (cycles > 0) cycles = DMAs[7]->Run(cycles);
                 ARM7Offset = -cycles;
+                RunTimingCriticalDevices(1, critcycles);
             }
             else
             {