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what the actual F*** is going on

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This commit is contained in:
Jaklyy 2024-06-09 12:18:31 -04:00
parent be60c68aeb
commit b90d5c2320
1 changed files with 18 additions and 23 deletions
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31
src/ARM.cpp
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@ -290,20 +290,20 @@ void ARMv5::BuggedJumpTo32(const u32 addr)
{ {
// ldrd to pc // ldrd to pc
// behavior seems to be related to if a bugged 8/16 bit write has prefetch aborted (does any p.abort work?) // behavior seems to be related to if a bugged 8/16 bit write has prefetch aborted (does any p.abort work?)
// switching to thumb mode only seems to work the first time after one of the above aborts? // switching to thumb mode only seems to work the first time an ldrd pc is executed after one of the above aborts?
// writing to pc seems to fail entirely if an abort hasn't occured and thumb interworking is in v4 mode // also it can restore cpsr but only if the PU is disabled (?????????????????????????????????????)
if (BuggyJump == 1) if (BuggyJump == 1)
{ {
BuggyJump = 2; BuggyJump = 2;
JumpTo(addr);
} if (CP15Control & (1<<15))
else if ((BuggyJump == 0) && (CP15Control & (1<<15))) JumpTo(addr & ~0x1, !(CP15Control & 1));
{ else
return; // checkme JumpTo(addr, !(CP15Control & 1));
} }
else else
{ {
JumpTo(addr & ~0x1); JumpTo(addr & ~0x1, !(CP15Control & 1));
} }
} }
@ -313,22 +313,17 @@ void ARMv5::BuggedJumpTo(const u32 addr)
// if they're misaligned they'll prefetch abort // if they're misaligned they'll prefetch abort
// but they can only prefetch abort once, every time afterwards will succeed (more testing needed) // but they can only prefetch abort once, every time afterwards will succeed (more testing needed)
// if the lsb is set they will try to switch to thumb state, though it'll fail if they haven't prefetch aborted yet // if the lsb is set they will try to switch to thumb state, though it'll fail if they haven't prefetch aborted yet
// they work as expected if thumb interwork is set to v4 mode if ((BuggyJump == 0) && (addr & 0x3))
if (BuggyJump == 0)
{
if (CP15Control & (1<<15))
{
JumpTo(addr & ~1);
return;
}
else if (addr & 0x3)
{ {
if (addr & 0x1) CPSR |= 0x20; if (addr & 0x1) CPSR |= 0x20;
BuggyJump = 1; BuggyJump = 1;
PrefetchAbort(); PrefetchAbort();
return; return;
} }
}
if (CP15Control & (1<<15))
JumpTo(addr & ~0x1);
else
JumpTo(addr); JumpTo(addr);
} }