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https://github.com/melonDS-emu/melonDS.git
synced 2025-07-24 14:49:53 -06:00
decouple JIT from Config. bahahahahah
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@ -106,7 +106,7 @@ bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
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if (Thumb || CurInstr.Cond() == 0xE)
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RegCache.PutLiteral(rd, val);
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return true;
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}
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@ -119,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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if (size == 16)
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addressMask = ~1;
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if (Config::JIT_LiteralOptimisations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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if (LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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{
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u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
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@ -136,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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Comp_AddCycles_CDI();
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}
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bool addrIsStatic = Config::JIT_LiteralOptimisations
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bool addrIsStatic = LiteralOptimizations
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&& RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
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u32 staticAddress;
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if (addrIsStatic)
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@ -172,7 +172,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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if (!(flags & memop_SubtractOffset) && rm.IsSimpleReg() && rnMapped.IsSimpleReg()
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&& op2.Reg.Op == 0 && op2.Reg.Amount > 0 && op2.Reg.Amount <= 3)
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{
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LEA(32, finalAddr,
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LEA(32, finalAddr,
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MComplex(rnMapped.GetSimpleReg(), rm.GetSimpleReg(), 1 << op2.Reg.Amount, 0));
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}
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else
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@ -200,7 +200,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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? ARMJIT_Memory::ClassifyAddress9(CurInstr.DataRegion)
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: ARMJIT_Memory::ClassifyAddress7(CurInstr.DataRegion);
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if (Config::JIT_FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
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if (ARMJIT::FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
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{
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if (rdMapped.IsImm())
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{
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@ -370,7 +370,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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}
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PopRegs(false, false);
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if (!(flags & memop_Store))
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{
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if (flags & memop_SignExtend)
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@ -431,7 +431,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
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else
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Comp_AddCycles_CD();
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bool compileFastPath = Config::JIT_FastMemory
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bool compileFastPath = FastMemory
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&& !usermode && (CurInstr.Cond() < 0xE || ARMJIT_Memory::IsFastmemCompatible(expectedTarget));
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// we need to make sure that the stack stays aligned to 16 bytes
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@ -623,7 +623,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
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LEA(64, ABI_PARAM2, MDisp(RSP, allocOffset));
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else
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MOV(64, R(ABI_PARAM2), R(RSP));
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MOV(32, R(ABI_PARAM3), Imm32(regsCount));
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if (Num == 0)
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MOV(64, R(ABI_PARAM4), R(RCPU));
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@ -637,7 +637,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
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}
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ADD(64, R(RSP), stackAlloc <= INT8_MAX ? Imm8(stackAlloc) : Imm32(stackAlloc));
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PopRegs(false, false);
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}
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@ -668,7 +668,7 @@ void Compiler::A_Comp_MemWB()
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bool load = CurInstr.Instr & (1 << 20);
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bool byte = CurInstr.Instr & (1 << 22);
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int size = byte ? 8 : 32;
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int flags = 0;
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if (!load)
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flags |= memop_Store;
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@ -742,7 +742,7 @@ void Compiler::T_Comp_MemReg()
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bool load = op & 0x2;
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bool byte = op & 0x1;
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Comp_MemAccess(CurInstr.T_Reg(0), CurInstr.T_Reg(3), Op2(CurInstr.T_Reg(6), 0, 0),
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Comp_MemAccess(CurInstr.T_Reg(0), CurInstr.T_Reg(3), Op2(CurInstr.T_Reg(6), 0, 0),
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byte ? 8 : 32, load ? 0 : memop_Store);
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}
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@ -809,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
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{
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u32 offset = (CurInstr.Instr & 0xFF) << 2;
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u32 addr = (R15 & ~0x2) + offset;
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if (!Config::JIT_LiteralOptimisations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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if (!LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
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}
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