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jit: branch instructions
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@ -462,38 +462,10 @@ s32 Compiler::Comp_MemAccessBlock(OpArg rb, BitSet16 regs, bool store, bool prei
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{
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int regsCount = regs.Count();
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const u8 userModeOffsets[] =
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{
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offsetof(ARM, R[8]), offsetof(ARM, R[9]), offsetof(ARM, R[10]), offsetof(ARM, R[11]),
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offsetof(ARM, R[12]), offsetof(ARM, R[13]), offsetof(ARM, R[14]), 0,
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offsetof(ARM, R_FIQ[0]), offsetof(ARM, R_FIQ[1]), offsetof(ARM, R_FIQ[2]), offsetof(ARM, R_FIQ[3]),
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offsetof(ARM, R_FIQ[4]), offsetof(ARM, R_FIQ[5]), offsetof(ARM, R_FIQ[6]), 0,
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offsetof(ARM, R[8]), offsetof(ARM, R[9]), offsetof(ARM, R[10]), offsetof(ARM, R[11]),
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offsetof(ARM, R[12]), offsetof(ARM, R_IRQ[13]), offsetof(ARM, R_IRQ[14]), 0,
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offsetof(ARM, R[8]), offsetof(ARM, R[9]), offsetof(ARM, R[10]), offsetof(ARM, R[11]),
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offsetof(ARM, R[12]), offsetof(ARM, R_SVC[13]), offsetof(ARM, R_SVC[14]), 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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offsetof(ARM, R[8]), offsetof(ARM, R[9]), offsetof(ARM, R[10]), offsetof(ARM, R[11]),
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offsetof(ARM, R[12]), offsetof(ARM, R_ABT[13]), offsetof(ARM, R_ABT[14]), 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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offsetof(ARM, R[8]), offsetof(ARM, R[9]), offsetof(ARM, R[10]), offsetof(ARM, R[11]),
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offsetof(ARM, R[12]), offsetof(ARM, R_UND[13]), offsetof(ARM, R_UND[14]), 0,
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};
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if (decrement)
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{
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MOV_sum(32, ABI_PARAM1, rb, Imm32(-regsCount * 4));
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preinc = !preinc;
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preinc ^= true;
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}
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else
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MOV(32, R(ABI_PARAM1), rb);
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@ -516,16 +488,16 @@ s32 Compiler::Comp_MemAccessBlock(OpArg rb, BitSet16 regs, bool store, bool prei
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{
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if (regs[reg])
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{
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if (usermode && reg >= 8 && reg < 15)
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/*if (usermode && reg >= 8 && reg < 15)
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{
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MOV(32, R(RSCRATCH2), R(RCPSR));
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AND(32, R(RSCRATCH2), Imm8(0x1F));
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// (RSCRATCH2 - 0x11) * 8 + squeezePointer(userModeOffsets) + (reg - 8), algebra is great!
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MOVZX(32, 8, RSCRATCH2, MScaled(RSCRATCH2, SCALE_8, squeezePointer(userModeOffsets) - 0x11 * 8 + (reg - 8)));
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MOVZX(32, 8, RSCRATCH2, MScaled(RSCRATCH2, SCALE_8, squeezePointer(userModeOffsets) - 0x10 * 8 + (reg - 8)));
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POP(RSCRATCH);
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MOV(32, MRegSum(RCPU, RSCRATCH2), R(RSCRATCH));
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}
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else if (RegCache.Mapping[reg] == INVALID_REG)
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else */if (RegCache.Mapping[reg] == INVALID_REG)
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{
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assert(reg != 15);
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@ -552,16 +524,16 @@ s32 Compiler::Comp_MemAccessBlock(OpArg rb, BitSet16 regs, bool store, bool prei
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{
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for (int reg : regs)
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{
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if (usermode && reg >= 8 && reg < 15)
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/*if (usermode && reg >= 8 && reg < 15)
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{
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MOV(32, R(RSCRATCH), R(RCPSR));
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AND(32, R(RSCRATCH), Imm8(0x1F));
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// (RSCRATCH2 - 0x11) * 8 + squeezePointer(userModeOffsets) + (reg - 8), algebra is great!
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MOVZX(32, 8, RSCRATCH, MScaled(RSCRATCH, SCALE_8, squeezePointer(userModeOffsets) - 0x11 * 8 + (reg - 8)));
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MOVZX(32, 8, RSCRATCH, MScaled(RSCRATCH, SCALE_8, squeezePointer(userModeOffsets) - 0x10 * 8 + (reg - 8)));
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MOV(32, R(RSCRATCH), MRegSum(RCPU, RSCRATCH));
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PUSH(RSCRATCH);
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}
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else if (RegCache.Mapping[reg] == INVALID_REG)
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else */if (RegCache.Mapping[reg] == INVALID_REG)
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{
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LoadReg(reg, RSCRATCH);
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PUSH(RSCRATCH);
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