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https://github.com/melonDS-emu/melonDS.git
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JIT: base
all instructions are interpreted
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RSDuck
332
src/ARMJIT_x64/ARMJIT_Compiler.cpp
Normal file
332
src/ARMJIT_x64/ARMJIT_Compiler.cpp
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#include "ARMJIT_Compiler.h"
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#include "../ARMInterpreter.h"
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#include <assert.h>
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using namespace Gen;
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namespace ARMJIT
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{
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const int RegCache::NativeRegAllocOrder[] = {(int)RBX, (int)RSI, (int)RDI, (int)R12, (int)R13};
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const int RegCache::NativeRegsCount = 5;
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Compiler::Compiler()
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{
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AllocCodeSpace(1024 * 1024 * 4);
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}
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typedef void (Compiler::*CompileFunc)();
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typedef void (*InterpretFunc)(ARM*);
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void Compiler::LoadCPSR()
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{
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assert(!CPSRDirty);
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MOV(32, R(RCPSR), MDisp(RCPU, offsetof(ARM, CPSR)));
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}
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void Compiler::SaveCPSR()
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{
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if (CPSRDirty)
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{
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MOV(32, MDisp(RCPU, offsetof(ARM, CPSR)), R(RCPSR));
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CPSRDirty = false;
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}
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}
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CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount)
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{
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if (IsAlmostFull())
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{
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ResetBlocks();
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ResetCodePtr();
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}
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CompiledBlock res = (CompiledBlock)GetWritableCodePtr();
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ConstantCycles = 0;
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Thumb = cpu->CPSR & 0x20;
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Num = cpu->Num;
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R15 = cpu->R[15];
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ABI_PushRegistersAndAdjustStack({ABI_ALL_CALLEE_SAVED}, 8, 0);
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MOV(64, R(RCPU), ImmPtr(cpu));
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XOR(32, R(RCycles), R(RCycles));
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LoadCPSR();
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for (int i = 0; i < instrsCount; i++)
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{
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R15 += Thumb ? 2 : 4;
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CurrentInstr = instrs[i];
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CompileFunc comp = NULL;
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if (comp == NULL || i == instrsCount - 1)
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{
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MOV(32, MDisp(RCPU, offsetof(ARM, R[15])), Imm32(R15));
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MOV(32, MDisp(RCPU, offsetof(ARM, CodeCycles)), Imm32(CurrentInstr.CodeCycles));
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MOV(32, MDisp(RCPU, offsetof(ARM, CurInstr)), Imm32(CurrentInstr.Instr));
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if (i == instrsCount - 1)
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{
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MOV(32, MDisp(RCPU, offsetof(ARM, NextInstr[0])), Imm32(CurrentInstr.NextInstr[0]));
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MOV(32, MDisp(RCPU, offsetof(ARM, NextInstr[1])), Imm32(CurrentInstr.NextInstr[1]));
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}
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SaveCPSR();
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}
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if (Thumb)
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{
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if (comp == NULL)
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{
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MOV(64, R(ABI_PARAM1), R(RCPU));
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u32 icode = (CurrentInstr.Instr >> 6) & 0x3FF;
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ABI_CallFunction(ARMInterpreter::THUMBInstrTable[icode]);
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}
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else
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{
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}
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}
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else
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{
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u32 cond = CurrentInstr.Cond();
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if (CurrentInstr.Info.Kind == ARMInstrInfo::ak_BLX_IMM)
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{
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MOV(64, R(ABI_PARAM1), R(RCPU));
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ABI_CallFunction(ARMInterpreter::A_BLX_IMM);
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}
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else if (cond == 0xF)
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AddCycles_C();
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else
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{
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FixupBranch skipExecute;
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if (cond < 0xE)
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{
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if (cond >= 0x8)
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{
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static_assert(RSCRATCH3 == ECX);
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MOV(32, R(RSCRATCH3), R(RCPSR));
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SHR(32, R(RSCRATCH3), Imm8(28));
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MOV(32, R(RSCRATCH), Imm32(1));
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SHL(32, R(RSCRATCH), R(RSCRATCH3));
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TEST(32, R(RSCRATCH), Imm32(ARM::ConditionTable[cond]));
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skipExecute = J_CC(CC_Z);
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}
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else
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{
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// could have used a LUT, but then where would be the fun?
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BT(32, R(RCPSR), Imm8(28 + ((~(cond >> 1) & 1) << 1 | (cond >> 2 & 1) ^ (cond >> 1 & 1))));
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skipExecute = J_CC(cond & 1 ? CC_C : CC_NC);
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}
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}
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if (comp == NULL)
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{
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MOV(64, R(ABI_PARAM1), R(RCPU));
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u32 icode = ((CurrentInstr.Instr >> 4) & 0xF) | ((CurrentInstr.Instr >> 16) & 0xFF0);
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ABI_CallFunction(ARMInterpreter::ARMInstrTable[icode]);
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}
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else
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{
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}
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FixupBranch skipFailed;
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if (CurrentInstr.Cond() < 0xE)
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{
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skipFailed = J();
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SetJumpTarget(skipExecute);
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AddCycles_C();
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SetJumpTarget(skipFailed);
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}
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}
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}
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/*
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we don't need to collect the interpreted cycles,
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since all functions only add to it, the dispatcher
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can take care of it.
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*/
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if (comp == NULL && i != instrsCount - 1)
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LoadCPSR();
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}
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SaveCPSR();
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LEA(32, RAX, MDisp(RCycles, ConstantCycles));
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ABI_PopRegistersAndAdjustStack({ABI_ALL_CALLEE_SAVED}, 8, 0);
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RET();
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return res;
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}
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void Compiler::Compile(RegCache& regs, const FetchedInstr& instr)
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{
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const CompileFunc A_Comp[ARMInstrInfo::ak_Count] =
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{
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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const CompileFunc T_Comp[ARMInstrInfo::tk_Count] = {
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL
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};
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}
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void Compiler::AddCycles_C()
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{
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s32 cycles = Num ?
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NDS::ARM7MemTimings[CurrentInstr.CodeCycles][Thumb ? 1 : 3]
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: ((R15 & 0x2) ? 0 : CurrentInstr.CodeCycles);
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if (CurrentInstr.Cond() < 0xE)
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ADD(32, R(RCycles), Imm8(cycles));
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else
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ConstantCycles += cycles;
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}
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// may uses RSCRATCH for op2 and RSCRATCH2 for the carryValue
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OpArg Compiler::Comp_ShiftRegImm(int op, int amount, Gen::X64Reg rm, bool S, bool& carryUsed)
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{
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carryUsed = true;
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switch (op)
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{
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case 0: // LSL
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if (amount > 0)
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{
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MOV(32, R(RSCRATCH), R(rm));
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SHL(32, R(RSCRATCH), Imm8(amount));
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if (S)
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SETcc(CC_C, R(RSCRATCH2));
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return R(RSCRATCH);
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}
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else
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{
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carryUsed = false;
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return R(rm);
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}
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case 1: // LSR
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if (amount > 0)
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{
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MOV(32, R(RSCRATCH), R(rm));
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SHR(32, R(RSCRATCH), Imm8(amount));
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if (S)
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SETcc(CC_C, R(RSCRATCH2));
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return R(RSCRATCH);
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}
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else
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{
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if (S)
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{
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MOV(32, R(RSCRATCH2), R(rm));
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SHR(32, R(RSCRATCH2), Imm8(31));
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}
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return Imm32(0);
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}
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case 2: // ASR
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MOV(32, R(RSCRATCH), R(rm));
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SAR(32, R(RSCRATCH), Imm8(amount ? amount : 31));
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if (S)
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{
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if (amount == 0)
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{
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MOV(32, R(RSCRATCH2), R(rm));
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SHR(32, R(RSCRATCH2), Imm8(31));
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}
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else
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SETcc(CC_C, R(RSCRATCH2));
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}
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return R(RSCRATCH);
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case 3: // ROR
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if (amount > 0)
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{
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MOV(32, R(RSCRATCH), R(rm));
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ROR_(32, R(RSCRATCH), Imm8(amount));
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}
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else
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{
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BT(32, R(RCPSR), Imm8(29));
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MOV(32, R(RSCRATCH), R(rm));
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RCR(32, R(RSCRATCH), Imm8(1));
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}
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if (S)
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SETcc(CC_C, R(RSCRATCH2));
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return R(RSCRATCH);
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}
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}
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void Compiler::A_Comp_ALU(const FetchedInstr& instr)
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{
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}
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}
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