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JIT: base

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all instructions are interpreted
This commit is contained in:
RSDuck
2019-06-22 01:28:32 +02:00
parent aa6ff499f9
commit c692287eba
27 changed files with 7700 additions and 2 deletions
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17
src/NDS.cpp
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@ -32,6 +32,7 @@
#include "Wifi.h"
#include "AREngine.h"
#include "Platform.h"
#include "ARMJIT.h"
#include "DSi.h"
#include "DSi_SPI_TSC.h"
@ -168,6 +169,8 @@ bool Init()
ARM9 = new ARMv5();
ARM7 = new ARMv4();
ARMJIT::Init();
DMAs[0] = new DMA(0, 0);
DMAs[1] = new DMA(0, 1);
DMAs[2] = new DMA(0, 2);
@ -200,6 +203,8 @@ void DeInit()
delete ARM9;
delete ARM7;
ARMJIT::DeInit();
for (int i = 0; i < 8; i++)
delete DMAs[i];
@ -1971,6 +1976,8 @@ u32 ARM9Read32(u32 addr)
void ARM9Write8(u32 addr, u8 val)
{
ARMJIT::Invalidate16(0, addr);
switch (addr & 0xFF000000)
{
case 0x02000000:
@ -2021,6 +2028,8 @@ void ARM9Write8(u32 addr, u8 val)
void ARM9Write16(u32 addr, u16 val)
{
ARMJIT::Invalidate16(0, addr);
switch (addr & 0xFF000000)
{
case 0x02000000:
@ -2087,6 +2096,8 @@ void ARM9Write16(u32 addr, u16 val)
void ARM9Write32(u32 addr, u32 val)
{
ARMJIT::Invalidate32(0, addr);
switch (addr & 0xFF000000)
{
case 0x02000000:
@ -2381,6 +2392,8 @@ u32 ARM7Read32(u32 addr)
void ARM7Write8(u32 addr, u8 val)
{
ARMJIT::Invalidate16(1, addr);
switch (addr & 0xFF800000)
{
case 0x02000000:
@ -2440,6 +2453,8 @@ void ARM7Write8(u32 addr, u8 val)
void ARM7Write16(u32 addr, u16 val)
{
ARMJIT::Invalidate16(1, addr);
switch (addr & 0xFF800000)
{
case 0x02000000:
@ -2509,6 +2524,8 @@ void ARM7Write16(u32 addr, u16 val)
void ARM7Write32(u32 addr, u32 val)
{
ARMJIT::Invalidate32(1, addr);
switch (addr & 0xFF800000)
{
case 0x02000000: