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implement transfer delays for both SPI busses

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also make microphone input return 0x800
This commit is contained in:
StapleButter
2017-07-15 19:29:10 +02:00
parent 6b6389fbb4
commit cb0e026ec1
3 changed files with 32 additions and 4 deletions
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15
src/NDSCart.cpp
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@ -1117,12 +1117,20 @@ u32 ReadROMData()
void WriteSPICnt(u16 val)
{
SPICnt = (SPICnt & 0x0080) | (val & 0xE043);
if (SPICnt & (1<<7))
printf("!! CHANGING AUXSPICNT DURING TRANSFER: %04X\n", val);
}
void SPITransferDone(u32 param)
{
SPICnt &= ~(1<<7);
}
u8 ReadSPIData()
{
if (!(SPICnt & (1<<15))) return 0;
if (!(SPICnt & (1<<13))) return 0;
if (SPICnt & (1<<7)) return 0; // checkme
return NDSCart_SRAM::Read();
}
@ -1132,9 +1140,14 @@ void WriteSPIData(u8 val)
if (!(SPICnt & (1<<15))) return;
if (!(SPICnt & (1<<13))) return;
// TODO: take delays into account
if (SPICnt & (1<<7)) printf("!! WRITING AUXSPIDATA DURING PENDING TRANSFER\n");
SPICnt |= (1<<7);
NDSCart_SRAM::Write(val, SPICnt&(1<<6));
// SPI transfers one bit per cycle -> 8 cycles per byte
u32 delay = 8 * (8 << (SPICnt & 0x3));
NDS::ScheduleEvent(NDS::Event_ROMSPITransfer, false, delay, SPITransferDone, 0);
}
}