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implement transfer delays for both SPI busses

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also make microphone input return 0x800
This commit is contained in:
StapleButter
2017-07-15 19:29:10 +02:00
parent 6b6389fbb4
commit cb0e026ec1
3 changed files with 32 additions and 4 deletions
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2
src/NDS.h
View File

@ -32,6 +32,8 @@ enum
Event_DisplayFIFO, Event_DisplayFIFO,
Event_ROMTransfer, Event_ROMTransfer,
Event_ROMSPITransfer,
Event_SPITransfer,
Event_MAX Event_MAX
}; };

15
src/NDSCart.cpp
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@ -1117,12 +1117,20 @@ u32 ReadROMData()
void WriteSPICnt(u16 val) void WriteSPICnt(u16 val)
{ {
SPICnt = (SPICnt & 0x0080) | (val & 0xE043); SPICnt = (SPICnt & 0x0080) | (val & 0xE043);
if (SPICnt & (1<<7))
printf("!! CHANGING AUXSPICNT DURING TRANSFER: %04X\n", val);
}
void SPITransferDone(u32 param)
{
SPICnt &= ~(1<<7);
} }
u8 ReadSPIData() u8 ReadSPIData()
{ {
if (!(SPICnt & (1<<15))) return 0; if (!(SPICnt & (1<<15))) return 0;
if (!(SPICnt & (1<<13))) return 0; if (!(SPICnt & (1<<13))) return 0;
if (SPICnt & (1<<7)) return 0; // checkme
return NDSCart_SRAM::Read(); return NDSCart_SRAM::Read();
} }
@ -1132,9 +1140,14 @@ void WriteSPIData(u8 val)
if (!(SPICnt & (1<<15))) return; if (!(SPICnt & (1<<15))) return;
if (!(SPICnt & (1<<13))) return; if (!(SPICnt & (1<<13))) return;
// TODO: take delays into account if (SPICnt & (1<<7)) printf("!! WRITING AUXSPIDATA DURING PENDING TRANSFER\n");
SPICnt |= (1<<7);
NDSCart_SRAM::Write(val, SPICnt&(1<<6)); NDSCart_SRAM::Write(val, SPICnt&(1<<6));
// SPI transfers one bit per cycle -> 8 cycles per byte
u32 delay = 8 * (8 << (SPICnt & 0x3));
NDS::ScheduleEvent(NDS::Event_ROMSPITransfer, false, delay, SPITransferDone, 0);
} }
} }

19
src/SPI.cpp
View File

@ -454,6 +454,7 @@ void Write(u8 val, u32 hold)
{ {
case 0x10: ConvResult = TouchY; break; case 0x10: ConvResult = TouchY; break;
case 0x50: ConvResult = TouchX; break; case 0x50: ConvResult = TouchX; break;
case 0x60: ConvResult = 0x800; break; // TODO: mic
default: ConvResult = 0xFFF; break; default: ConvResult = 0xFFF; break;
} }
@ -505,11 +506,21 @@ void WriteCnt(u16 val)
{ {
Cnt = (Cnt & 0x0080) | (val & 0xCF03); Cnt = (Cnt & 0x0080) | (val & 0xCF03);
if (val & 0x0400) printf("!! CRAPOED 16BIT SPI MODE\n"); if (val & 0x0400) printf("!! CRAPOED 16BIT SPI MODE\n");
if (Cnt & (1<<7)) printf("!! CHANGING SPICNT DURING TRANSFER: %04X\n", val);
}
void TransferDone(u32 param)
{
Cnt &= ~(1<<7);
if (Cnt & (1<<14))
NDS::SetIRQ(1, NDS::IRQ_SPI);
} }
u8 ReadData() u8 ReadData()
{ {
if (!(Cnt & (1<<15))) return 0; if (!(Cnt & (1<<15))) return 0;
if (Cnt & (1<<7)) return 0; // checkme
switch (Cnt & 0x0300) switch (Cnt & 0x0300)
{ {
@ -524,8 +535,9 @@ void WriteData(u8 val)
{ {
if (!(Cnt & (1<<15))) return; if (!(Cnt & (1<<15))) return;
// TODO: take delays into account if (Cnt & (1<<7)) printf("!! WRITING AUXSPIDATA DURING PENDING TRANSFER\n");
Cnt |= (1<<7);
switch (Cnt & 0x0300) switch (Cnt & 0x0300)
{ {
case 0x0000: SPI_Powerman::Write(val, Cnt&(1<<11)); break; case 0x0000: SPI_Powerman::Write(val, Cnt&(1<<11)); break;
@ -534,8 +546,9 @@ void WriteData(u8 val)
default: printf("SPI to unknown device %04X %02X\n", Cnt, val); break; default: printf("SPI to unknown device %04X %02X\n", Cnt, val); break;
} }
if (Cnt & (1<<14)) // SPI transfers one bit per cycle -> 8 cycles per byte
NDS::SetIRQ(1, NDS::IRQ_SPI); u32 delay = 8 * (8 << (Cnt & 0x3));
NDS::ScheduleEvent(NDS::Event_SPITransfer, false, delay, TransferDone, 0);
} }
} }