mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-23 22:29:47 -06:00
more DSP unfucking: make Teakra directly use melonDS's NWRAM banks instead of trying to translate to a flat buffer, fixes bugs with the way the memory banks are ordered etc
This commit is contained in:
64
src/DSi.cpp
64
src/DSi.cpp
@ -991,23 +991,22 @@ void MapNWRAM_A(u32 num, u8 val)
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MBK[1][mbkn] = MBK[0][mbkn];
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// have priority of the last written MBK over the others
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// However the hardware has a fixed order. Therefore
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 4; part++)
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// the mapping, so the result is independent on the MBK write order
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for (int part = 0; part < 4; part++)
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{
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NWRAMMap_A[0][part] = NULL;
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NWRAMMap_A[1][part] = NULL;
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NWRAMMap_A[0][part] = nullptr;
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NWRAMMap_A[1][part] = nullptr;
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}
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for (int part = 3; part >= 0; part--)
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{
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u8* ptr = &NWRAM_A[part << 16];
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if ((MBK[0][0 + (part / 4)] >> ((part % 4) * 8)) & 0x80)
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u8 mVal = (MBK[0][0 + (part >> 2)] >> ((part & 3) * 8)) & 0xFD;
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if (mVal & 0x80)
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{
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u8 mVal = (MBK[0][0 + (part / 4)] >> ((part % 4) * 8)) & 0xfd;
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NWRAMMap_A[mVal & 0x03][(mVal >> 2) & 0x3] = ptr;
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}
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}
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@ -1039,30 +1038,24 @@ void MapNWRAM_B(u32 num, u8 val)
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MBK[1][mbkn] = MBK[0][mbkn];
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// have priority of the last written MBK over the others
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// However the hardware has a fixed order. Therefore
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 8; part++)
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// the mapping, so the result is independent on the MBK write order
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for (int part = 0; part < 8; part++)
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{
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NWRAMMap_B[0][part] = NULL;
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NWRAMMap_B[1][part] = NULL;
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NWRAMMap_B[2][part] = NULL;
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NWRAMMap_B[0][part] = nullptr;
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NWRAMMap_B[1][part] = nullptr;
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NWRAMMap_B[2][part] = nullptr;
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}
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for (int part = 7; part >= 0; part--)
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{
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u8* ptr = &NWRAM_B[part << 15];
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if (part == num)
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u8 mVal = (MBK[0][1 + (part >> 2)] >> ((part & 3) * 8)) & 0xFF;
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if (mVal & 0x80)
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{
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DSi_DSP::OnMBKCfg('B', num, oldval, val, ptr);
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}
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if ((MBK[0][1 + (part / 4)] >> ((part % 4) * 8)) & 0x80)
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{
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u8 mVal = (MBK[0][1 + (part / 4)] >> ((part % 4) * 8)) & 0xff;
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if (mVal & 0x02) mVal &= 0xFE;
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NWRAMMap_B[mVal & 0x03][(mVal >> 2) & 0x7] = ptr;
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}
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}
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@ -1094,28 +1087,23 @@ void MapNWRAM_C(u32 num, u8 val)
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MBK[1][mbkn] = MBK[0][mbkn];
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// have priority of the last written MBK over the others
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// However the hardware has a fixed order. Therefore
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 8; part++)
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// the mapping, so the result is independent on the MBK write order
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for (int part = 0; part < 8; part++)
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{
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NWRAMMap_C[0][part] = NULL;
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NWRAMMap_C[1][part] = NULL;
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NWRAMMap_C[2][part] = NULL;
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NWRAMMap_C[0][part] = nullptr;
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NWRAMMap_C[1][part] = nullptr;
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NWRAMMap_C[2][part] = nullptr;
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}
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for (int part = 7; part >= 0; part--)
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{
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u8* ptr = &NWRAM_C[part << 15];
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if (part == num)
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u8 mVal = MBK[0][3 + (part >> 2)] >> ((part & 3) * 8) & 0xFF;
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if (mVal & 0x80)
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{
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DSi_DSP::OnMBKCfg('C', num, oldval, val, ptr);
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}
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if ((MBK[0][3 + (part / 4)] >> ((part % 4) * 8)) & 0x80)
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{
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u8 mVal = MBK[0][3 + (part / 4)] >> ((part % 4) *8) & 0xff;
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if (mVal & 0x02) mVal &= 0xFE;
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NWRAMMap_C[mVal & 0x03][(mVal >> 2) & 0x7] = ptr;
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}
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