mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-06-28 01:49:42 -06:00
Refactor DSi_NAND (#1844)
* Refactor diskio's contents - Change ff_disk_read_cb/write_cb into a std::function instead of a raw pointer - Add const specifiers as needed * Refactor DSi_NAND to manage the file system's mounted lifetime with RAII * Split NANDMount into NANDMount and NANDImage - NANDImage is used for information about the NAND that doesn't require decryption or filesystem access - NANDMount is used to actually access the file system - Both classes manage their respective resources (the NAND file handle and the NAND's mount) with RAII - Also split the file loading into another function that I will remove in a later PR * Make NANDMount immovable * Remove NAND-loading code that I had sectioned off into a function - Incomplete copypasta - I must have gotten distracted * Tidy up NANDImage's initialization - Don't unmount the disk image if the constructor fails (that's NANDMount's job now) - Only assign CurFile if the constructor succeeds * Add some const-correctness * Move DSi NAND initialization to the frontend - The NANDImage is now installed via a unique_ptr in DSi * Remove Platform::DSi_NANDPath - Not Config::DSiNANDPath; that can still be configured as usual - The core no longer needs to care
This commit is contained in:
Jesse Talavera-Greenberg
committed by
GitHub
GitHub
parent
b2fcff97c1
commit
d4e51f8060
100
src/DSi.cpp
100
src/DSi.cpp
@ -75,12 +75,10 @@ u32 NWRAMMask[2][3];
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u32 NDMACnt[2];
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DSi_NDMA* NDMAs[8];
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std::unique_ptr<DSi_NAND::NANDImage> NANDImage;
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DSi_SDHost* SDMMC;
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DSi_SDHost* SDIO;
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u64 ConsoleID;
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u8 eMMC_CID[16];
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// FIXME: these currently have no effect (and aren't stored in a savestate)
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// ... not that they matter all that much
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u8 GPIO_Data;
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@ -149,6 +147,10 @@ void DeInit()
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SDMMC = nullptr;
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delete SDIO;
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SDIO = nullptr;
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NANDImage = nullptr;
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// The NANDImage is cleaned up (and its underlying file closed)
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// as part of unique_ptr's destructor
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}
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void Reset()
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@ -528,24 +530,25 @@ void SetupDirectBoot()
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ARM9Write32(0x02FFE000+i, tmp);
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}
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if (DSi_NAND::Init(&DSi::ARM7iBIOS[0x8308]))
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{
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DSi_NAND::DSiFirmwareSystemSettings userdata {};
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DSi_NAND::ReadUserData(userdata);
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for (u32 i = 0; i < 0x128; i+=4)
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ARM9Write32(0x02000400+i, *(u32*)&userdata.Bytes[0x88+i]);
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if (NANDImage && *NANDImage)
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{ // If a NAND image is installed, and it's valid...
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if (DSi_NAND::NANDMount nand = DSi_NAND::NANDMount(*NANDImage))
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{
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DSi_NAND::DSiFirmwareSystemSettings userdata {};
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nand.ReadUserData(userdata);
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for (u32 i = 0; i < 0x128; i+=4)
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ARM9Write32(0x02000400+i, *(u32*)&userdata.Bytes[0x88+i]);
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DSi_NAND::DSiSerialData hwinfoS {};
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DSi_NAND::DSiHardwareInfoN hwinfoN;
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DSi_NAND::ReadHardwareInfo(hwinfoS, hwinfoN);
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DSi_NAND::DSiSerialData hwinfoS {};
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DSi_NAND::DSiHardwareInfoN hwinfoN;
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nand.ReadHardwareInfo(hwinfoS, hwinfoN);
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for (u32 i = 0; i < 0x14; i+=4)
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ARM9Write32(0x02000600+i, *(u32*)&hwinfoN[0x88+i]);
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for (u32 i = 0; i < 0x14; i+=4)
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ARM9Write32(0x02000600+i, *(u32*)&hwinfoN[0x88+i]);
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for (u32 i = 0; i < 0x18; i+=4)
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ARM9Write32(0x02FFFD68+i, *(u32*)&hwinfoS.Bytes[0x88+i]);
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DSi_NAND::DeInit();
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for (u32 i = 0; i < 0x18; i+=4)
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ARM9Write32(0x02FFFD68+i, *(u32*)&hwinfoS.Bytes[0x88+i]);
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}
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}
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SPI_Firmware::WifiBoard nwifiver = SPI_Firmware::GetFirmware()->Header().WifiBoard;
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@ -728,15 +731,21 @@ void SoftReset()
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bool LoadNAND()
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{
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if (!NANDImage)
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{
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Log(LogLevel::Error, "No NAND image loaded\n");
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return false;
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}
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Log(LogLevel::Info, "Loading DSi NAND\n");
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if (!DSi_NAND::Init(&DSi::ARM7iBIOS[0x8308]))
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DSi_NAND::NANDMount nandmount(*NANDImage);
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if (!nandmount)
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{
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Log(LogLevel::Error, "Failed to load DSi NAND\n");
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return false;
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}
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FileHandle* nand = DSi_NAND::GetFile();
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FileHandle* nand = NANDImage->GetFile();
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// Make sure NWRAM is accessible.
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// The Bits are set to the startup values in Reset() and we might
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@ -892,13 +901,9 @@ bool LoadNAND()
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}
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}
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#define printhex(str, size) { for (int z = 0; z < (size); z++) printf("%02X", (str)[z]); printf("\n"); }
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#define printhex_rev(str, size) { for (int z = (size)-1; z >= 0; z--) printf("%02X", (str)[z]); printf("\n"); }
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DSi_NAND::GetIDs(eMMC_CID, ConsoleID);
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Log(LogLevel::Debug, "eMMC CID: "); printhex(eMMC_CID, 16);
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Log(LogLevel::Debug, "Console ID: %" PRIx64 "\n", ConsoleID);
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const DSi_NAND::DSiKey& emmccid = NANDImage->GetEMMCID();
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Log(LogLevel::Debug, "eMMC CID: %08llX%08llX\n", *(const u64*)&emmccid[0], *(const u64*)&emmccid[8]);
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Log(LogLevel::Debug, "Console ID: %" PRIx64 "\n", NANDImage->GetConsoleID());
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if (Platform::GetConfigBool(Platform::DSi_FullBIOSBoot))
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{
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@ -909,10 +914,10 @@ bool LoadNAND()
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else
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{
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u32 eaddr = 0x03FFE6E4;
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ARM7Write32(eaddr+0x00, *(u32*)&eMMC_CID[0]);
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ARM7Write32(eaddr+0x04, *(u32*)&eMMC_CID[4]);
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ARM7Write32(eaddr+0x08, *(u32*)&eMMC_CID[8]);
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ARM7Write32(eaddr+0x0C, *(u32*)&eMMC_CID[12]);
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ARM7Write32(eaddr+0x00, *(const u32*)&emmccid[0]);
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ARM7Write32(eaddr+0x04, *(const u32*)&emmccid[4]);
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ARM7Write32(eaddr+0x08, *(const u32*)&emmccid[8]);
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ARM7Write32(eaddr+0x0C, *(const u32*)&emmccid[12]);
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ARM7Write16(eaddr+0x2C, 0x0001);
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ARM7Write16(eaddr+0x2E, 0x0001);
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ARM7Write16(eaddr+0x3C, 0x0100);
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@ -939,9 +944,7 @@ bool LoadNAND()
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NDS::ARM7->JumpTo(bootparams[6]);
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}
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DSi_NAND::PatchUserData();
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DSi_NAND::DeInit();
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nandmount.PatchUserData();
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return true;
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}
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@ -2690,6 +2693,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
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u8 ARM7IORead8(u32 addr)
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{
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switch (addr)
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{
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case 0x04004000:
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@ -2710,14 +2714,14 @@ u8 ARM7IORead8(u32 addr)
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case 0x04004500: return DSi_I2C::ReadData();
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case 0x04004501: return DSi_I2C::Cnt;
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFF;
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case 0x04004D01: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 8) & 0xFF;
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case 0x04004D02: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 16) & 0xFF;
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case 0x04004D03: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 24) & 0xFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 32) & 0xFF;
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case 0x04004D05: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 40) & 0xFF;
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 48) & 0xFF;
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case 0x04004D07: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 56;
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() & 0xFF;
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case 0x04004D01: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 8) & 0xFF;
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case 0x04004D02: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 16) & 0xFF;
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case 0x04004D03: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 24) & 0xFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 32) & 0xFF;
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case 0x04004D05: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 40) & 0xFF;
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 48) & 0xFF;
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case 0x04004D07: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() >> 56;
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case 0x04004D08: return 0;
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case 0x4004700: return DSi_DSP::SNDExCnt;
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@ -2757,10 +2761,10 @@ u16 ARM7IORead16(u32 addr)
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CASE_READ16_32BIT(0x0400405C, MBK[1][7])
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CASE_READ16_32BIT(0x04004060, MBK[1][8])
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFFFF;
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case 0x04004D02: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 16) & 0xFFFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 32) & 0xFFFF;
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 48;
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() & 0xFFFF;
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case 0x04004D02: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 16) & 0xFFFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (NANDImage->GetConsoleID() >> 32) & 0xFFFF;
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case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() >> 48;
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case 0x04004D08: return 0;
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case 0x4004700: return DSi_DSP::SNDExCnt;
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@ -2836,8 +2840,8 @@ u32 ARM7IORead32(u32 addr)
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case 0x04004400: return DSi_AES::ReadCnt();
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case 0x0400440C: return DSi_AES::ReadOutputFIFO();
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFFFFFFFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 32;
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case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() & 0xFFFFFFFF;
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case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return NANDImage->GetConsoleID() >> 32;
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case 0x04004D08: return 0;
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case 0x4004700:
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