mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-26 15:50:00 -06:00
lay some base
This commit is contained in:
96
src/DSi.cpp
96
src/DSi.cpp
@ -39,6 +39,7 @@
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#include "DSi_DSP.h"
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#include "DSi_Camera.h"
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#include "sha1/sha1.hpp"
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#include "tiny-AES-c/aes.hpp"
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@ -499,7 +500,7 @@ bool LoadNAND()
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if (memcmp(nand_footer, nand_footer_ref, 16))
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{
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// There is another copy of the footer at 000FF800h for the case
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// that by external tools the image was cut off
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// that by external tools the image was cut off
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// See https://problemkaputt.de/gbatek.htm#dsisdmmcimages
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fseek(SDMMCFile, 0x000FF800, SEEK_SET);
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fread(nand_footer, 1, 16, SDMMCFile);
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@ -529,6 +530,71 @@ bool LoadNAND()
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memcpy(&ARM7Init[0x0254], &ARM7iBIOS[0xC6D0], 0x1048);
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memcpy(&ARM7Init[0x129C], &ARM7iBIOS[0xD718], 0x1048);
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// TEST ZONE
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{
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SHA1_CTX sha;
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u8 cidhash[20];
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u8 iv[16];
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SHA1Init(&sha);
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SHA1Update(&sha, eMMC_CID, 16);
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SHA1Final(cidhash, &sha);
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printf("ASS HASH: ");
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for (int i = 0; i < 20; i++) printf("%02X", cidhash[i]);
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printf("\n");
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DSi_AES::Swap16(iv, cidhash);
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printf("ASS IV: ");
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for (int i = 0; i < 16; i++) printf("%02X", iv[i]);
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printf("\n");
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u8 keyX[16];
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*(u32*)&keyX[0] = (u32)ConsoleID;
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*(u32*)&keyX[4] = (u32)ConsoleID ^ 0x24EE6906;
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*(u32*)&keyX[8] = (u32)(ConsoleID >> 32) ^ 0xE65B601D;
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*(u32*)&keyX[12] = (u32)(ConsoleID >> 32);
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u8 keyY[16];
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*(u32*)&keyY[0] = 0x0AB9DC76;
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*(u32*)&keyY[4] = 0xBD4DC4D3;
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*(u32*)&keyY[8] = 0x202DDD1D;
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*(u32*)&keyY[12] = 0xE1A00005;
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u8 shittykey[16];
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DSi_AES::DeriveNormalKey(keyX, keyY, shittykey);
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u8 normalkey[16];
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DSi_AES::Swap16(normalkey, shittykey);
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u8 dorp[0x200];
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fseek(SDMMCFile, 0, SEEK_SET);
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fread(&dorp, 0x200, 1, SDMMCFile);
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AES_ctx ctx;
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AES_init_ctx_iv(&ctx, normalkey, iv);
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//AES_CTR_xcrypt_buffer(&ctx, dorp, 0x200);
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for (int i = 0; i < 0x200; i+=16)
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{
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u8 tmp[16];
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DSi_AES::Swap16(tmp, &dorp[i]);
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AES_CTR_xcrypt_buffer(&ctx, tmp, 16);
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DSi_AES::Swap16(&dorp[i], tmp);
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}
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//printf("%08X %08X %08X %08X\n", *(u32*)&dorp[0], *(u32*)&dorp[4], *(u32*)&dorp[8], *(u32*)&dorp[12]);
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for (int i = 0; i < 0x200; i+=16)
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{
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for (int j = 0; j < 16; j++)
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{
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printf("%02X ", dorp[i+j]);
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}
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printf("\n");
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}
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}
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return true;
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}
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@ -638,7 +704,7 @@ void MapNWRAM_A(u32 num, u8 val)
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// However the hardware has a fixed order. Therefor
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 4; part++)
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@ -686,7 +752,7 @@ void MapNWRAM_B(u32 num, u8 val)
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// However the hardware has a fixed order. Therefor
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 8; part++)
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@ -741,7 +807,7 @@ void MapNWRAM_C(u32 num, u8 val)
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// When we only update the mapping on the written MBK, we will
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// have priority of the last witten MBK over the others
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// However the hardware has a fixed order. Therefor
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// However the hardware has a fixed order. Therefor
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// we need to iterate through them all in a fixed order and update
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// the mapping, so the result is independend on the MBK write order
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for (unsigned int part = 0; part < 8; part++)
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@ -2139,17 +2205,17 @@ void ARM9IOWrite32(u32 addr, u32 val)
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MapNWRAM_C(6, (val >> 16) & 0xFF);
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MapNWRAM_C(7, val >> 24);
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return;
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case 0x04004054:
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case 0x04004054:
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if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(0, 0, val);
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return;
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case 0x04004058:
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case 0x04004058:
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if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(0, 1, val);
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MapNWRAMRange(0, 1, val);
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return;
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case 0x0400405C:
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case 0x0400405C:
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if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(0, 2, val);
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@ -2200,7 +2266,7 @@ u8 ARM7IORead8(u32 addr)
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{
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switch (addr)
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{
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case 0x04004000:
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case 0x04004000:
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return SCFG_BIOS & 0xFF;
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case 0x04004001: return SCFG_BIOS >> 8;
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@ -2456,27 +2522,27 @@ void ARM7IOWrite32(u32 addr, u32 val)
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Set_SCFG_MC(val);
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return;
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case 0x04004054:
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case 0x04004054:
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if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(1, 0, val);
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return;
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case 0x04004058:
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case 0x04004058:
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if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(1, 1, val);
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return;
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case 0x0400405C:
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case 0x0400405C:
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if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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MapNWRAMRange(1, 2, val);
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return;
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case 0x04004060:
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case 0x04004060:
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if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/
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return;
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val &= 0x00FFFF0F;
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MBK[0][8] = val;
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MBK[1][8] = val;
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MBK[0][8] = val;
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MBK[1][8] = val;
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return;
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case 0x04004100: NDMACnt[1] = val & 0x800F0000; return;
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