mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-22 05:40:15 -06:00
more instructions. shared WRAM.
This commit is contained in:
133
NDS.cpp
133
NDS.cpp
@ -18,6 +18,13 @@ u8 ARM7BIOS[0x4000];
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u8 MainRAM[0x400000];
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u8 SharedWRAM[0x8000];
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u8 WRAMCnt;
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u8* SWRAM_ARM9;
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u8* SWRAM_ARM7;
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u32 SWRAM_ARM9Mask;
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u32 SWRAM_ARM7Mask;
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u8 ARM7WRAM[0x10000];
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u8 ARM9ITCM[0x8000];
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@ -68,10 +75,14 @@ void Reset()
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}
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memset(MainRAM, 0, 0x400000);
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memset(SharedWRAM, 0, 0x8000);
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memset(ARM7WRAM, 0, 0x10000);
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memset(ARM9ITCM, 0, 0x8000);
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memset(ARM9DTCM, 0, 0x4000);
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WRAMCnt = 0;
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MapSharedWRAM();
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ARM9ITCMSize = 0;
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ARM9DTCMBase = 0xFFFFFFFF;
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ARM9DTCMSize = 0;
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@ -112,6 +123,41 @@ void Halt()
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}
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void MapSharedWRAM()
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{
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switch (WRAMCnt & 0x3)
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{
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case 0:
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SWRAM_ARM9 = &SharedWRAM[0];
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SWRAM_ARM9Mask = 0x7FFF;
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SWRAM_ARM7 = NULL;
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SWRAM_ARM7Mask = 0;
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break;
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case 1:
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SWRAM_ARM9 = &SharedWRAM[0x4000];
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SWRAM_ARM9Mask = 0x3FFF;
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SWRAM_ARM7 = &SharedWRAM[0];
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SWRAM_ARM7Mask = 0x3FFF;
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break;
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case 2:
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SWRAM_ARM9 = &SharedWRAM[0];
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SWRAM_ARM9Mask = 0x3FFF;
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SWRAM_ARM7 = &SharedWRAM[0x4000];
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SWRAM_ARM7Mask = 0x3FFF;
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break;
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case 3:
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SWRAM_ARM9 = NULL;
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SWRAM_ARM9Mask = 0;
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SWRAM_ARM7 = &SharedWRAM[0];
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SWRAM_ARM7Mask = 0x7FFF;
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break;
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}
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}
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u8 ARM9Read8(u32 addr)
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{
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@ -132,6 +178,17 @@ u8 ARM9Read8(u32 addr)
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{
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case 0x02000000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM9) return *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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else return 0;
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case 0x04000000:
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switch (addr)
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{
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case 0x04000247:
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return WRAMCnt;
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}
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}
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printf("unknown arm9 read8 %08X\n", addr);
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@ -158,6 +215,10 @@ u16 ARM9Read16(u32 addr)
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case 0x02000000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM9) return *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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else return 0;
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case 0x04000000:
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switch (addr)
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{
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@ -188,6 +249,10 @@ u32 ARM9Read32(u32 addr)
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{
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case 0x02000000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM9) return *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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else return 0;
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}
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printf("unknown arm9 read32 %08X | %08X\n", addr, ARM9->R[15]);
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@ -212,6 +277,19 @@ void ARM9Write8(u32 addr, u8 val)
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case 0x02000000:
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM9) *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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return;
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case 0x04000000:
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switch (addr)
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{
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case 0x04000247:
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WRAMCnt = val;
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MapSharedWRAM();
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return;
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}
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}
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printf("unknown arm9 write8 %08X %02X\n", addr, val);
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@ -236,6 +314,10 @@ void ARM9Write16(u32 addr, u16 val)
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM9) *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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return;
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case 0x04000000:
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switch (addr)
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{
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@ -273,6 +355,10 @@ void ARM9Write32(u32 addr, u32 val)
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case 0x02000000:
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM9) *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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return;
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}
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printf("unknown arm9 write32 %08X %08X | %08X\n", addr, val, ARM9->R[15]);
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@ -292,8 +378,19 @@ u8 ARM7Read8(u32 addr)
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case 0x02000000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM7) return *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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else return *(u8*)&ARM7WRAM[addr & 0xFFFF];
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case 0x03800000:
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return *(u8*)&ARM7WRAM[addr & 0xFFFF];
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case 0x04000000:
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switch (addr)
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{
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case 0x04000241:
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return WRAMCnt;
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}
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}
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printf("unknown arm7 read8 %08X\n", addr);
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@ -312,6 +409,10 @@ u16 ARM7Read16(u32 addr)
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case 0x02000000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM7) return *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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else return *(u16*)&ARM7WRAM[addr & 0xFFFF];
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case 0x03800000:
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return *(u16*)&ARM7WRAM[addr & 0xFFFF];
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@ -338,8 +439,19 @@ u32 ARM7Read32(u32 addr)
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case 0x02000000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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case 0x03000000:
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if (SWRAM_ARM7) return *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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else return *(u32*)&ARM7WRAM[addr & 0xFFFF];
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case 0x03800000:
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return *(u32*)&ARM7WRAM[addr & 0xFFFF];
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case 0x04000000:
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switch (addr)
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{
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case 0x040001A4:
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return 0x00800000; // hax
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}
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}
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if ((addr&0xFF000000) == 0xEA000000) Halt();
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printf("unknown arm7 read32 %08X | %08X\n", addr, ARM7->R[15]);
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@ -354,12 +466,17 @@ void ARM7Write8(u32 addr, u8 val)
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM7) *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
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else *(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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case 0x03800000:
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*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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}
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printf("unknown arm7 write8 %08X %02X\n", addr, val);
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printf("unknown arm7 write8 %08X %02X | %08X\n", addr, val, ARM7->R[15]);
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}
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void ARM7Write16(u32 addr, u16 val)
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@ -370,6 +487,11 @@ void ARM7Write16(u32 addr, u16 val)
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM7) *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
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else *(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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case 0x03800000:
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*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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@ -390,7 +512,7 @@ void ARM7Write16(u32 addr, u16 val)
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}
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}
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printf("unknown arm7 write16 %08X %04X\n", addr, val);
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printf("unknown arm7 write16 %08X %04X | %08X\n", addr, val, ARM7->R[15]);
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}
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void ARM7Write32(u32 addr, u32 val)
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@ -401,12 +523,17 @@ void ARM7Write32(u32 addr, u32 val)
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03000000:
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if (SWRAM_ARM7) *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
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else *(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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case 0x03800000:
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*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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}
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printf("unknown arm7 write32 %08X %08X\n", addr, val);
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printf("unknown arm7 write32 %08X %08X | %08X\n", addr, val, ARM7->R[15]);
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}
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}
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