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first steps in bringing over the JIT refactor/fastmem

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This commit is contained in:
RSDuck
2020-06-14 21:04:25 +02:00
parent fea9f95bba
commit e335a8ca76
25 changed files with 2368 additions and 1624 deletions
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70
src/ARMJIT_Internal.h
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@ -3,8 +3,11 @@
#include "types.h"
#include <stdint.h>
#include <string.h>
#include <assert.h>
#include "ARMJIT.h"
#include "ARMJIT_Memory.h"
// here lands everything which doesn't fit into ARMJIT.h
// where it would be included by pretty much everything
@ -160,8 +163,8 @@ public:
Data.SetLength(numAddresses * 2 + numLiterals);
}
u32 PseudoPhysicalAddr;
u32 StartAddr;
u32 StartAddrLocal;
u32 InstrHash, LiteralHash;
u8 Num;
u16 NumAddresses;
@ -175,28 +178,8 @@ public:
{ return &Data[NumAddresses]; }
u32* Literals()
{ return &Data[NumAddresses * 2]; }
u32* Links()
{ return &Data[NumAddresses * 2 + NumLiterals]; }
u32 NumLinks()
{ return Data.Length - NumAddresses * 2 - NumLiterals; }
void AddLink(u32 link)
{
Data.Add(link);
}
void ResetLinks()
{
Data.SetLength(NumAddresses * 2 + NumLiterals);
}
private:
/*
0..<NumInstrs - the instructions of the block
NumInstrs..<(NumLinks + NumInstrs) - pseudo physical addresses where the block is located
(atleast one, the pseudo physical address of the block)
*/
TinyVector<u32> Data;
};
@ -207,45 +190,32 @@ struct __attribute__((packed)) AddressRange
u32 Code;
};
extern AddressRange CodeRanges[ExeMemSpaceSize / 512];
typedef void (*InterpreterFunc)(ARM* cpu);
extern InterpreterFunc InterpretARM[];
extern InterpreterFunc InterpretTHUMB[];
extern u8 MemoryStatus9[0x800000];
extern u8 MemoryStatus7[0x800000];
extern TinyVector<u32> InvalidLiterals;
void* GetFuncForAddr(ARM* cpu, u32 addr, bool store, int size);
extern AddressRange* const CodeMemRegions[ARMJIT_Memory::memregions_Count];
inline bool PageContainsCode(AddressRange* range)
{
for (int i = 0; i < 8; i++)
{
if (range[i].Blocks.Length > 0)
return true;
}
return false;
}
u32 LocaliseCodeAddress(u32 num, u32 addr);
template <u32 Num>
void LinkBlock(ARM* cpu, u32 codeOffset);
enum
{
memregion_Other = 0,
memregion_ITCM,
memregion_DTCM,
memregion_BIOS9,
memregion_MainRAM,
memregion_SWRAM9,
memregion_SWRAM7,
memregion_IO9,
memregion_VRAM,
memregion_BIOS7,
memregion_WRAM7,
memregion_IO7,
memregion_Wifi,
memregion_VWRAM,
};
int ClassifyAddress9(u32 addr);
int ClassifyAddress7(u32 addr);
template <typename T> T SlowRead9(ARMv5* cpu, u32 addr);
template <typename T> void SlowWrite9(ARMv5* cpu, u32 addr, T val);
template <typename T> T SlowRead9(u32 addr, ARMv5* cpu);
template <typename T> void SlowWrite9(u32 addr, ARMv5* cpu, T val);
template <typename T> T SlowRead7(u32 addr);
template <typename T> void SlowWrite7(u32 addr, T val);