mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-25 15:19:53 -06:00
first steps in bringing over the JIT refactor/fastmem
This commit is contained in:
RSDuck
220
src/NDS.cpp
220
src/NDS.cpp
@ -33,6 +33,7 @@
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#include "AREngine.h"
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#include "Platform.h"
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#include "ARMJIT.h"
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#include "ARMJIT_Memory.h"
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#include "DSi.h"
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#include "DSi_SPI_TSC.h"
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@ -94,17 +95,17 @@ u32 CPUStop;
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u8 ARM9BIOS[0x1000];
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u8 ARM7BIOS[0x4000];
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u8 MainRAM[0x1000000];
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u8* MainRAM;
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u32 MainRAMMask;
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u8 SharedWRAM[0x8000];
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u8* SharedWRAM;
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u8 WRAMCnt;
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u8* SWRAM_ARM9;
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u8* SWRAM_ARM7;
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u32 SWRAM_ARM9Mask;
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u32 SWRAM_ARM7Mask;
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u8 ARM7WRAM[0x10000];
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// putting them together so they're always next to each other
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MemRegion SWRAM_ARM9;
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MemRegion SWRAM_ARM7;
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u8* ARM7WRAM;
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u16 ExMemCnt[2];
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@ -171,6 +172,10 @@ bool Init()
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#ifdef JIT_ENABLED
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ARMJIT::Init();
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#else
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MainRAM = new u8[MainRAMSize];
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ARM7WRAM = new u8[ARM7WRAMSize];
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SharedWRAM = new u8[SharedWRAMSize];
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#endif
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DMAs[0] = new DMA(0, 0);
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@ -485,6 +490,10 @@ void Reset()
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printf("ARM7 BIOS loaded\n");
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fclose(f);
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}
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#ifdef JIT_ENABLED
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ARMJIT::Reset();
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#endif
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if (ConsoleType == 1)
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{
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@ -510,7 +519,7 @@ void Reset()
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InitTimings();
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memset(MainRAM, 0, 0x1000000);
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memset(MainRAM, 0, MainRAMMask + 1);
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memset(SharedWRAM, 0, 0x8000);
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memset(ARM7WRAM, 0, 0x10000);
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@ -587,10 +596,6 @@ void Reset()
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}
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AREngine::Reset();
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#ifdef JIT_ENABLED
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ARMJIT::Reset();
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#endif
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}
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void Stop()
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@ -705,7 +710,7 @@ bool DoSavestate(Savestate* file)
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file->VarArray(MainRAM, 0x400000);
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file->VarArray(SharedWRAM, 0x8000);
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file->VarArray(ARM7WRAM, 0x10000);
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file->VarArray(ARM7WRAM, ARM7WRAMSize);
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file->VarArray(ExMemCnt, 2*sizeof(u16));
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file->VarArray(ROMSeed0, 2*8);
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@ -1128,43 +1133,40 @@ void MapSharedWRAM(u8 val)
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if (val == WRAMCnt)
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return;
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ARMJIT_Memory::RemapSWRAM();
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WRAMCnt = val;
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switch (WRAMCnt & 0x3)
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{
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case 0:
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SWRAM_ARM9 = &SharedWRAM[0];
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SWRAM_ARM9Mask = 0x7FFF;
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SWRAM_ARM7 = NULL;
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SWRAM_ARM7Mask = 0;
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SWRAM_ARM9.Mem = &SharedWRAM[0];
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SWRAM_ARM9.Mask = 0x7FFF;
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SWRAM_ARM7.Mem = NULL;
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SWRAM_ARM7.Mask = 0;
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break;
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case 1:
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SWRAM_ARM9 = &SharedWRAM[0x4000];
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SWRAM_ARM9Mask = 0x3FFF;
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SWRAM_ARM7 = &SharedWRAM[0];
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SWRAM_ARM7Mask = 0x3FFF;
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SWRAM_ARM9.Mem = &SharedWRAM[0x4000];
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SWRAM_ARM9.Mask = 0x3FFF;
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SWRAM_ARM7.Mem = &SharedWRAM[0];
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SWRAM_ARM7.Mask = 0x3FFF;
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break;
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case 2:
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SWRAM_ARM9 = &SharedWRAM[0];
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SWRAM_ARM9Mask = 0x3FFF;
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SWRAM_ARM7 = &SharedWRAM[0x4000];
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SWRAM_ARM7Mask = 0x3FFF;
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SWRAM_ARM9.Mem = &SharedWRAM[0];
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SWRAM_ARM9.Mask = 0x3FFF;
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SWRAM_ARM7.Mem = &SharedWRAM[0x4000];
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SWRAM_ARM7.Mask = 0x3FFF;
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break;
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case 3:
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SWRAM_ARM9 = NULL;
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SWRAM_ARM9Mask = 0;
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SWRAM_ARM7 = &SharedWRAM[0];
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SWRAM_ARM7Mask = 0x7FFF;
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SWRAM_ARM9.Mem = NULL;
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SWRAM_ARM9.Mask = 0;
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SWRAM_ARM7.Mem = &SharedWRAM[0];
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SWRAM_ARM7.Mask = 0x7FFF;
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break;
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}
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#ifdef JIT_ENABLED
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ARMJIT::UpdateMemoryStatus9(0x3000000, 0x3000000 + 0x1000000);
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ARMJIT::UpdateMemoryStatus7(0x3000000, 0x3000000 + 0x1000000);
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#endif
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}
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@ -1835,12 +1837,12 @@ u8 ARM9Read8(u32 addr)
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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return *(u8*)&MainRAM[addr & MainRAMMask];
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return *(u8*)&MainRAM[addr & (MainRAMSize - 1)];
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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return *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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return *(u8*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask];
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}
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else
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{
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@ -1900,12 +1902,12 @@ u16 ARM9Read16(u32 addr)
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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return *(u16*)&MainRAM[addr & MainRAMMask];
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return *(u16*)&MainRAM[addr & (MainRAMSize - 1)];
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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return *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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return *(u16*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask];
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}
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else
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{
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@ -1968,9 +1970,9 @@ u32 ARM9Read32(u32 addr)
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return *(u32*)&MainRAM[addr & MainRAMMask];
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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return *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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return *(u32*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask];
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}
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else
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{
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@ -2026,7 +2028,7 @@ void ARM9Write8(u32 addr, u8 val)
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{
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case 0x02000000:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateMainRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr);
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#endif
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*(u8*)&MainRAM[addr & MainRAMMask] = val;
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#ifdef JIT_ENABLED
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@ -2035,12 +2037,12 @@ void ARM9Write8(u32 addr, u8 val)
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return;
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateSWRAM9IfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_SWRAM>(addr);
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#endif
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*(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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*(u8*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask] = val;
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}
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return;
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@ -2085,7 +2087,7 @@ void ARM9Write16(u32 addr, u16 val)
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{
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case 0x02000000:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateMainRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr);
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#endif
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*(u16*)&MainRAM[addr & MainRAMMask] = val;
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#ifdef JIT_ENABLED
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@ -2094,12 +2096,12 @@ void ARM9Write16(u32 addr, u16 val)
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return;
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateSWRAM9IfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_SWRAM>(addr);
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#endif
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*(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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*(u16*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask] = val;
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}
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return;
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@ -2113,18 +2115,16 @@ void ARM9Write16(u32 addr, u16 val)
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return;
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case 0x06000000:
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#ifdef JIT_ENABLED
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_VRAM>(addr);
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#endif
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switch (addr & 0x00E00000)
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{
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case 0x00000000: GPU::WriteVRAM_ABG<u16>(addr, val); return;
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case 0x00200000: GPU::WriteVRAM_BBG<u16>(addr, val); return;
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case 0x00400000: GPU::WriteVRAM_AOBJ<u16>(addr, val); return;
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case 0x00600000: GPU::WriteVRAM_BOBJ<u16>(addr, val); return;
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default:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateLCDCIfNecessary(addr);
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#endif
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GPU::WriteVRAM_LCDC<u16>(addr, val);
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return;
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default: GPU::WriteVRAM_LCDC<u16>(addr, val); return;
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}
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case 0x07000000:
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@ -2165,7 +2165,7 @@ void ARM9Write32(u32 addr, u32 val)
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{
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case 0x02000000:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateMainRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr);
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#endif
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*(u32*)&MainRAM[addr & MainRAMMask] = val;
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#ifdef JIT_ENABLED
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@ -2174,12 +2174,12 @@ void ARM9Write32(u32 addr, u32 val)
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return ;
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateSWRAM9IfNecessary(addr);
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_SWRAM>(addr);
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#endif
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*(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
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*(u32*)&SWRAM_ARM9.Mem[addr & SWRAM_ARM9.Mask] = val;
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}
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return;
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@ -2193,18 +2193,16 @@ void ARM9Write32(u32 addr, u32 val)
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return;
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case 0x06000000:
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#ifdef JIT_ENABLED
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ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_VRAM>(addr);
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#endif
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switch (addr & 0x00E00000)
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{
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case 0x00000000: GPU::WriteVRAM_ABG<u32>(addr, val); return;
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case 0x00200000: GPU::WriteVRAM_BBG<u32>(addr, val); return;
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case 0x00400000: GPU::WriteVRAM_AOBJ<u32>(addr, val); return;
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case 0x00600000: GPU::WriteVRAM_BOBJ<u32>(addr, val); return;
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default:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateLCDCIfNecessary(addr);
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#endif
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GPU::WriteVRAM_LCDC<u32>(addr, val);
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return;
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default: GPU::WriteVRAM_LCDC<u32>(addr, val); return;
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}
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case 0x07000000:
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@ -2250,10 +2248,10 @@ bool ARM9GetMemRegion(u32 addr, bool write, MemRegion* region)
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return true;
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case 0x03000000:
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if (SWRAM_ARM9)
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if (SWRAM_ARM9.Mem)
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{
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region->Mem = SWRAM_ARM9;
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region->Mask = SWRAM_ARM9Mask;
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region->Mem = SWRAM_ARM9.Mem;
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region->Mask = SWRAM_ARM9.Mask;
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return true;
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}
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break;
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@ -2292,17 +2290,17 @@ u8 ARM7Read8(u32 addr)
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return *(u8*)&MainRAM[addr & MainRAMMask];
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case 0x03000000:
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if (SWRAM_ARM7)
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if (SWRAM_ARM7.Mem)
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{
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return *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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return *(u8*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask];
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}
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else
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{
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return *(u8*)&ARM7WRAM[addr & 0xFFFF];
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return *(u8*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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}
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case 0x03800000:
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return *(u8*)&ARM7WRAM[addr & 0xFFFF];
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return *(u8*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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case 0x04000000:
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return ARM7IORead8(addr);
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@ -2352,17 +2350,17 @@ u16 ARM7Read16(u32 addr)
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return *(u16*)&MainRAM[addr & MainRAMMask];
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case 0x03000000:
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if (SWRAM_ARM7)
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if (SWRAM_ARM7.Mem)
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{
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return *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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return *(u16*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask];
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}
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else
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{
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return *(u16*)&ARM7WRAM[addr & 0xFFFF];
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return *(u16*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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}
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case 0x03800000:
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return *(u16*)&ARM7WRAM[addr & 0xFFFF];
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return *(u16*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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case 0x04000000:
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return ARM7IORead16(addr);
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@ -2419,17 +2417,17 @@ u32 ARM7Read32(u32 addr)
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return *(u32*)&MainRAM[addr & MainRAMMask];
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case 0x03000000:
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if (SWRAM_ARM7)
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if (SWRAM_ARM7.Mem)
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{
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return *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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return *(u32*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask];
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}
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else
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{
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return *(u32*)&ARM7WRAM[addr & 0xFFFF];
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return *(u32*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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}
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case 0x03800000:
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return *(u32*)&ARM7WRAM[addr & 0xFFFF];
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return *(u32*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)];
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case 0x04000000:
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return ARM7IORead32(addr);
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@ -2474,7 +2472,7 @@ void ARM7Write8(u32 addr, u8 val)
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case 0x02000000:
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case 0x02800000:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateMainRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr);
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#endif
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*(u8*)&MainRAM[addr & MainRAMMask] = val;
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#ifdef JIT_ENABLED
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@ -2483,28 +2481,28 @@ void ARM7Write8(u32 addr, u8 val)
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return;
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case 0x03000000:
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if (SWRAM_ARM7)
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if (SWRAM_ARM7.Mem)
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{
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateSWRAM7IfNecessary(addr);
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ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_SWRAM>(addr);
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#endif
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*(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
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*(u8*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask] = val;
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return;
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}
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else
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{
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
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#endif
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*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
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*(u8*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
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return;
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}
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case 0x03800000:
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#ifdef JIT_ENABLED
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ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
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ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
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#endif
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*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
|
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*(u8*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
|
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return;
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|
||||
case 0x04000000:
|
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@ -2514,7 +2512,7 @@ void ARM7Write8(u32 addr, u8 val)
|
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case 0x06000000:
|
||||
case 0x06800000:
|
||||
#ifdef JIT_ENABLED
|
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ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
|
||||
#endif
|
||||
GPU::WriteVRAM_ARM7<u8>(addr, val);
|
||||
return;
|
||||
@ -2551,7 +2549,7 @@ void ARM7Write16(u32 addr, u16 val)
|
||||
case 0x02000000:
|
||||
case 0x02800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateMainRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr);
|
||||
#endif
|
||||
*(u16*)&MainRAM[addr & MainRAMMask] = val;
|
||||
#ifdef JIT_ENABLED
|
||||
@ -2560,28 +2558,28 @@ void ARM7Write16(u32 addr, u16 val)
|
||||
return;
|
||||
|
||||
case 0x03000000:
|
||||
if (SWRAM_ARM7)
|
||||
if (SWRAM_ARM7.Mem)
|
||||
{
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateSWRAM7IfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_SWRAM>(addr);
|
||||
#endif
|
||||
*(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
|
||||
*(u16*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask] = val;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
|
||||
#endif
|
||||
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
|
||||
*(u16*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
|
||||
return;
|
||||
}
|
||||
|
||||
case 0x03800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
|
||||
#endif
|
||||
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
|
||||
*(u16*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
|
||||
return;
|
||||
|
||||
case 0x04000000:
|
||||
@ -2599,7 +2597,7 @@ void ARM7Write16(u32 addr, u16 val)
|
||||
case 0x06000000:
|
||||
case 0x06800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
|
||||
#endif
|
||||
GPU::WriteVRAM_ARM7<u16>(addr, val);
|
||||
return;
|
||||
@ -2638,7 +2636,7 @@ void ARM7Write32(u32 addr, u32 val)
|
||||
case 0x02000000:
|
||||
case 0x02800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateMainRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr);
|
||||
#endif
|
||||
*(u32*)&MainRAM[addr & MainRAMMask] = val;
|
||||
#ifdef JIT_ENABLED
|
||||
@ -2647,28 +2645,28 @@ void ARM7Write32(u32 addr, u32 val)
|
||||
return;
|
||||
|
||||
case 0x03000000:
|
||||
if (SWRAM_ARM7)
|
||||
if (SWRAM_ARM7.Mem)
|
||||
{
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateSWRAM7IfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_SWRAM>(addr);
|
||||
#endif
|
||||
*(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
|
||||
*(u32*)&SWRAM_ARM7.Mem[addr & SWRAM_ARM7.Mask] = val;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
|
||||
#endif
|
||||
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
|
||||
*(u32*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
|
||||
return;
|
||||
}
|
||||
|
||||
case 0x03800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_WRAM7>(addr);
|
||||
#endif
|
||||
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
|
||||
*(u32*)&ARM7WRAM[addr & (ARM7WRAMSize - 1)] = val;
|
||||
return;
|
||||
|
||||
case 0x04000000:
|
||||
@ -2687,7 +2685,7 @@ void ARM7Write32(u32 addr, u32 val)
|
||||
case 0x06000000:
|
||||
case 0x06800000:
|
||||
#ifdef JIT_ENABLED
|
||||
ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
|
||||
ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_VWRAM>(addr);
|
||||
#endif
|
||||
GPU::WriteVRAM_ARM7<u32>(addr, val);
|
||||
return;
|
||||
@ -2736,17 +2734,17 @@ bool ARM7GetMemRegion(u32 addr, bool write, MemRegion* region)
|
||||
// then access all the WRAM as one contiguous block starting at 0x037F8000
|
||||
// this case needs a bit of a hack to cover
|
||||
// it's not really worth bothering anyway
|
||||
if (!SWRAM_ARM7)
|
||||
if (!SWRAM_ARM7.Mem)
|
||||
{
|
||||
region->Mem = ARM7WRAM;
|
||||
region->Mask = 0xFFFF;
|
||||
region->Mask = ARM7WRAMSize-1;
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x03800000:
|
||||
region->Mem = ARM7WRAM;
|
||||
region->Mask = 0xFFFF;
|
||||
region->Mask = ARM7WRAMSize-1;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user