mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-24 14:49:53 -06:00
Refactor NDS and DSi to be objects (#1893)
* First crack at refactoring NDS and DSi into objects - Remove all global/`static` variables in `NDS` and related classes - Rely more on virtual dispatch when we need to pick methods at runtime - Pass `NDS&` or `DSi&` to its constituent components where necessary - Introduce some headers or move some definitions to break `#include` cycles * Refactor the frontend to accommodate the core's changes * Move up `SchedList`'s declaration - Move it to before the components are initialized so the `map`s inside are initialized - Fields in C++ are initialized in the order they're declared * Fix a crash when allocating memory * Fix JIT-free builds * Fix GDB-free builds * Fix Linux builds - Explicitly qualify some member types in NDS, since they share the same name as their classes * Remove an unnecessary template argument - This was causing the build to fail on macOS * Fix ARM and Android builds * Rename `Constants.h` to `MemConstants.h` * Add `NDS::IsRunning()` * Use an `#include` guard instead of `#pragma once`
This commit is contained in:
Jesse Talavera-Greenberg
committed by
GitHub
GitHub
parent
c84cb17462
commit
e973236203
199
src/ARM.h
199
src/ARM.h
@ -22,7 +22,7 @@
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#include <algorithm>
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#include "types.h"
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#include "NDS.h"
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#include "MemRegion.h"
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#ifdef GDBSTUB_ENABLED
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#include "debug/GdbStub.h"
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@ -48,6 +48,8 @@ const u32 DTCMPhysicalSize = 0x4000;
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class ARMJIT;
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class GPU;
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class ARMJIT_Memory;
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class NDS;
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class Savestate;
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class ARM
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#ifdef GDBSTUB_ENABLED
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@ -55,7 +57,7 @@ class ARM
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#endif
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{
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public:
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ARM(u32 num, ARMJIT& jit, GPU& gpu);
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ARM(u32 num, NDS& nds);
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virtual ~ARM(); // destroy shit
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virtual void Reset();
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@ -73,6 +75,7 @@ public:
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Halted = halt;
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}
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void NocashPrint(u32 addr) noexcept;
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virtual void Execute() = 0;
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#ifdef JIT_ENABLED
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virtual void ExecuteJIT() = 0;
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@ -174,7 +177,7 @@ public:
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u32 ExceptionBase;
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NDS::MemRegion CodeMem;
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MemRegion CodeMem;
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#ifdef JIT_ENABLED
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u32 FastBlockLookupStart, FastBlockLookupSize;
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@ -186,14 +189,14 @@ public:
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Gdb::GdbStub GdbStub;
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#endif
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ARMJIT& JIT;
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melonDS::NDS& NDS;
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protected:
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u8 (*BusRead8)(u32 addr);
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u16 (*BusRead16)(u32 addr);
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u32 (*BusRead32)(u32 addr);
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void (*BusWrite8)(u32 addr, u8 val);
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void (*BusWrite16)(u32 addr, u16 val);
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void (*BusWrite32)(u32 addr, u32 val);
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virtual u8 BusRead8(u32 addr) = 0;
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virtual u16 BusRead16(u32 addr) = 0;
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virtual u32 BusRead32(u32 addr) = 0;
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virtual void BusWrite8(u32 addr, u8 val) = 0;
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virtual void BusWrite16(u32 addr, u16 val) = 0;
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virtual void BusWrite32(u32 addr, u32 val) = 0;
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#ifdef GDBSTUB_ENABLED
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bool IsSingleStep;
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@ -217,14 +220,12 @@ protected:
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void GdbCheckA();
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void GdbCheckB();
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void GdbCheckC();
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private:
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melonDS::GPU& GPU;
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};
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class ARMv5 : public ARM
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{
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public:
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ARMv5(ARMJIT& jit, melonDS::GPU& gpu);
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ARMv5(melonDS::NDS& nds);
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~ARMv5();
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void Reset() override;
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@ -296,7 +297,7 @@ public:
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// Cycles += numC + numD;
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}
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void GetCodeMemRegion(u32 addr, NDS::MemRegion* region);
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void GetCodeMemRegion(u32 addr, MemRegion* region);
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void CP15Reset();
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void CP15DoSavestate(Savestate* file);
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@ -357,20 +358,26 @@ public:
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u8* CurICacheLine;
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bool (*GetMemRegion)(u32 addr, bool write, NDS::MemRegion* region);
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bool (*GetMemRegion)(u32 addr, bool write, MemRegion* region);
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#ifdef GDBSTUB_ENABLED
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u32 ReadMem(u32 addr, int size) override;
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void WriteMem(u32 addr, int size, u32 v) override;
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#endif
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protected:
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u8 BusRead8(u32 addr) override;
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u16 BusRead16(u32 addr) override;
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u32 BusRead32(u32 addr) override;
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void BusWrite8(u32 addr, u8 val) override;
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void BusWrite16(u32 addr, u16 val) override;
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void BusWrite32(u32 addr, u32 val) override;
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};
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class ARMv4 : public ARM
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{
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public:
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ARMv4(ARMJIT& jit, melonDS::GPU& gpu);
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void Reset() override;
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ARMv4(melonDS::NDS& nds);
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void FillPipeline() override;
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@ -391,134 +398,25 @@ public:
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return BusRead32(addr);
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}
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void DataRead8(u32 addr, u32* val) override
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{
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*val = BusRead8(addr);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
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}
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void DataRead16(u32 addr, u32* val) override
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{
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addr &= ~1;
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*val = BusRead16(addr);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
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}
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void DataRead32(u32 addr, u32* val) override
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{
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addr &= ~3;
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*val = BusRead32(addr);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][2];
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}
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void DataRead32S(u32 addr, u32* val) override
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{
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addr &= ~3;
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*val = BusRead32(addr);
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DataCycles += NDS::ARM7MemTimings[addr >> 15][3];
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}
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void DataWrite8(u32 addr, u8 val) override
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{
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BusWrite8(addr, val);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
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}
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void DataWrite16(u32 addr, u16 val) override
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{
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addr &= ~1;
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BusWrite16(addr, val);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][0];
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}
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void DataWrite32(u32 addr, u32 val) override
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{
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addr &= ~3;
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BusWrite32(addr, val);
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DataRegion = addr;
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DataCycles = NDS::ARM7MemTimings[addr >> 15][2];
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}
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void DataWrite32S(u32 addr, u32 val) override
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{
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addr &= ~3;
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BusWrite32(addr, val);
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DataCycles += NDS::ARM7MemTimings[addr >> 15][3];
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}
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void AddCycles_C() override
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{
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// code only. this code fetch is sequential.
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Cycles += NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?1:3];
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}
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void AddCycles_CI(s32 num) override
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{
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// code+internal. results in a nonseq code fetch.
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Cycles += NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2] + num;
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}
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void AddCycles_CDI() override
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{
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// LDR/LDM cycles.
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s32 numC = NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2];
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s32 numD = DataCycles;
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if ((DataRegion >> 24) == 0x02) // mainRAM
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{
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if (CodeRegion == 0x02)
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Cycles += numC + numD;
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else
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{
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numC++;
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Cycles += std::max(numC + numD - 3, std::max(numC, numD));
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}
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}
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else if (CodeRegion == 0x02)
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{
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numD++;
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Cycles += std::max(numC + numD - 3, std::max(numC, numD));
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}
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else
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{
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Cycles += numC + numD + 1;
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}
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}
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void AddCycles_CD() override
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{
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// TODO: max gain should be 5c when writing to mainRAM
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s32 numC = NDS::ARM7MemTimings[CodeCycles][(CPSR&0x20)?0:2];
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s32 numD = DataCycles;
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if ((DataRegion >> 24) == 0x02)
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{
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if (CodeRegion == 0x02)
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Cycles += numC + numD;
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else
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Cycles += std::max(numC + numD - 3, std::max(numC, numD));
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}
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else if (CodeRegion == 0x02)
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{
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Cycles += std::max(numC + numD - 3, std::max(numC, numD));
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}
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else
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{
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Cycles += numC + numD;
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}
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}
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void DataRead8(u32 addr, u32* val) override;
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void DataRead16(u32 addr, u32* val) override;
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void DataRead32(u32 addr, u32* val) override;
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void DataRead32S(u32 addr, u32* val) override;
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void DataWrite8(u32 addr, u8 val) override;
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void DataWrite16(u32 addr, u16 val) override;
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void DataWrite32(u32 addr, u32 val) override;
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void DataWrite32S(u32 addr, u32 val) override;
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void AddCycles_C() override;
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void AddCycles_CI(s32 num) override;
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void AddCycles_CDI() override;
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void AddCycles_CD() override;
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protected:
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u8 BusRead8(u32 addr) override;
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u16 BusRead16(u32 addr) override;
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u32 BusRead32(u32 addr) override;
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void BusWrite8(u32 addr, u8 val) override;
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void BusWrite16(u32 addr, u16 val) override;
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void BusWrite32(u32 addr, u32 val) override;
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};
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namespace ARMInterpreter
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@ -528,14 +426,5 @@ void A_UNK(ARM* cpu);
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void T_UNK(ARM* cpu);
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}
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namespace NDS
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{
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extern ARMv5* ARM9;
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extern ARMv4* ARM7;
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}
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}
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#endif // ARM_H
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